[llvm] SelectionDAG/expandFMINNUM_FMAXNUM: skips vector if Op is legal for elements (PR #109570)

[YunQiang Su via llvm-commits]

================
@@ -8485,6 +8485,11 @@ SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode *Node,
                          Node->getOperand(1), Node->getFlags());
   }
 
+  // If we have INSN fitting this operation strictly for the elements of the
+  // vector, normally, splitting it is better than compare+select.
+  if (VT.isVector() && isOperationLegal(Node->getOpcode(), VT.getScalarType()))
+    return SDValue();
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wzssyqa wrote:

Oh, yes. For C code like
```
float *f(float *a, float *b, float *c) {
        for (int i=0; i<4; i++) {
                c[i] = a[i]>b[i]?a[i]:b[i];
        }
        return c;
}
```
We can use vset+vselect.
For MIPS MSA we have `FCLT + BSEL.V`, while I have no idea about other ISA.

https://github.com/llvm/llvm-project/pull/109570