[llvm] [KnownBits] Make `avg{Ceil,Floor}S` and `{s,u}{add,sub}_sat` optimal (PR #110329)
Yingwei Zheng via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 27 22:45:37 PDT 2024
================
@@ -766,12 +775,44 @@ KnownBits KnownBits::usub_sat(const KnownBits &LHS, const KnownBits &RHS) {
static KnownBits avgCompute(KnownBits LHS, KnownBits RHS, bool IsCeil,
bool IsSigned) {
unsigned BitWidth = LHS.getBitWidth();
- LHS = IsSigned ? LHS.sext(BitWidth + 1) : LHS.zext(BitWidth + 1);
- RHS = IsSigned ? RHS.sext(BitWidth + 1) : RHS.zext(BitWidth + 1);
- LHS =
- computeForAddCarry(LHS, RHS, /*CarryZero*/ !IsCeil, /*CarryOne*/ IsCeil);
- LHS = LHS.extractBits(BitWidth, 1);
- return LHS;
+ KnownBits ExtLHS = IsSigned ? LHS.sext(BitWidth + 1) : LHS.zext(BitWidth + 1);
+ KnownBits ExtRHS = IsSigned ? RHS.sext(BitWidth + 1) : RHS.zext(BitWidth + 1);
+ KnownBits Res = computeForAddCarry(ExtLHS, ExtRHS, /*CarryZero*/ !IsCeil,
+ /*CarryOne*/ IsCeil);
----------------
dtcxzyw wrote:
```suggestion
KnownBits Res = computeForAddCarry(ExtLHS, ExtRHS, /*CarryZero=*/!IsCeil,
/*CarryOne=*/IsCeil);
```
https://github.com/llvm/llvm-project/pull/110329
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