[llvm] [MIR] Serialize virtual register flags (PR #110228)

[Christudasan Devadasan via llvm-commits]

cdevadas wrote:

> Missing new test for this serialized field. Add a valid test here llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir Also, capture all invalid cases in a negative test.

Ignore this comment. I just noticed the other review (https://github.com/llvm/llvm-project/pull/110229) where you're adding the target-specific changes.

https://github.com/llvm/llvm-project/pull/110228