[llvm] [RISCV][MC] Support Assembling 48- and 64-bit Instructions (PR #110022)

[Sam Elliott via llvm-commits]

lenary wrote:

I hope this is ready for a re-review, given I think I have adequately taken into account the feedback from @jrtc27 about the instability of longer encodings, and have hopefully found a way forwards to allow users to begin experimenting with longer instruction encodings without being beholden to something that is not yet frozen/ratified in the specification.

I think once the specification does freeze/ratify some encodings for longer instructions, we can maybe start inferring lengths from the encoding again, which is to say I don't think this patch's behaviour has to be how `.insn` works indefinitely into the future.

I just added some docs to the review as well, to document how to use `.insn` for longer instructions, given the behaviour is no longer straightforward.

https://github.com/llvm/llvm-project/pull/110022