[llvm] [X86][AMX] Fix missing stride register for tileloadd (PR #110226)
Feng Zou via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 27 05:30:03 PDT 2024
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@@ -140,14 +140,16 @@ bool X86LowerTileCopy::runOnMachineFunction(MachineFunction &MF) {
MachineInstr *NewMI =
addFrameReference(BuildMI(MBB, MI, DL, TII->get(Opc)), TileSS)
.addReg(SrcReg, getKillRegState(SrcMO.isKill()));
- MachineOperand &MO = NewMI->getOperand(2);
- MO.setReg(GR64Cand ? GR64Cand : X86::RAX);
- MO.setIsKill(true);
+ MachineOperand *MO = &NewMI->getOperand(2);
+ MO->setReg(GR64Cand ? GR64Cand : X86::RAX);
// tileloadd (%sp, %idx), %tmm
Opc = GET_EGPR_IF_ENABLED(X86::TILELOADD);
#undef GET_EGPR_IF_ENABLED
NewMI = addFrameReference(BuildMI(MBB, MI, DL, TII->get(Opc), DstReg),
TileSS);
+ MO = &NewMI->getOperand(3);
----------------
fzou1 wrote:
Is it better to use "1 + X86::AddrIndexReg" instead of "3" as in line [X86InstrInfo.cpp#L4768](https://github.com/llvm/llvm-project/blob/a131fbf1687a641265ced45b19dc97ee1c9e3484/llvm/lib/Target/X86/X86InstrInfo.cpp#L4768)?
https://github.com/llvm/llvm-project/pull/110226
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