[llvm] [MIPS] Fix miscompiles consecutive half operations (PR #110199)

[via llvm-commits]

https://github.com/yingopq updated https://github.com/llvm/llvm-project/pull/110199

>From a618b4994822753119f2a65a60b50553e5148258 Mon Sep 17 00:00:00 2001
From: Ying Huang <ying.huang at oss.cipunited.com>
Date: Thu, 26 Sep 2024 22:39:13 -0400
Subject: [PATCH] [MIPS] Fix miscompiles consecutive half operations

Use softPromoteHalf legalization for fp16 rather than PromoteFloat.

Fix #97975.
---
 llvm/lib/Target/Mips/MipsISelLowering.h | 2 ++
 llvm/test/CodeGen/Mips/fp16-promote.ll  | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h b/llvm/lib/Target/Mips/MipsISelLowering.h
index 2b18b299180926..8033898091c756 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.h
+++ b/llvm/lib/Target/Mips/MipsISelLowering.h
@@ -365,6 +365,8 @@ class TargetRegisterClass;
       return ABI.IsN64() ? Mips::A1_64 : Mips::A1;
     }
 
+    bool softPromoteHalfType() const override { return true; }
+
     bool isJumpTableRelative() const override {
       return getTargetMachine().isPositionIndependent();
     }
diff --git a/llvm/test/CodeGen/Mips/fp16-promote.ll b/llvm/test/CodeGen/Mips/fp16-promote.ll
index 6cbfab5f776698..e6e39c0f1b5aaa 100644
--- a/llvm/test/CodeGen/Mips/fp16-promote.ll
+++ b/llvm/test/CodeGen/Mips/fp16-promote.ll
@@ -62,8 +62,8 @@ define <4 x float> @test_vec_fpext_float(ptr %p) #0 {
 ; CHECK-LIBCALL-LABEL: test_vec_fpext_double:
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
-; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: cvt.d.s
+; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: cvt.d.s
 ; CHECK-LIBCALL: cvt.d.s
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)