[llvm] [MIPS] Fix miscompiles consecutive half operations (PR #110199)

[via llvm-commits]

https://github.com/yingopq updated https://github.com/llvm/llvm-project/pull/110199

>From 260ff023d23874ba205678a02992e8758e12ea1e Mon Sep 17 00:00:00 2001
From: Ying Huang <ying.huang at oss.cipunited.com>
Date: Thu, 26 Sep 2024 22:39:13 -0400
Subject: [PATCH] [MIPS] Fix miscompiles consecutive half operations

Use softPromoteHalf legalization for fp16 rather than PromoteFloat.

Fix #97975.
---
 llvm/lib/Target/Mips/MipsISelLowering.h | 10 ++++++----
 llvm/test/CodeGen/Mips/fp16-promote.ll  |  2 +-
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h b/llvm/lib/Target/Mips/MipsISelLowering.h
index 2b18b299180926..5c11b811e6cab3 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.h
+++ b/llvm/lib/Target/Mips/MipsISelLowering.h
@@ -369,9 +369,11 @@ class TargetRegisterClass;
       return getTargetMachine().isPositionIndependent();
     }
 
-   CCAssignFn *CCAssignFnForCall() const;
+    CCAssignFn *CCAssignFnForCall() const;
 
-   CCAssignFn *CCAssignFnForReturn() const;
+    CCAssignFn *CCAssignFnForReturn() const;
+
+    bool softPromoteHalfType() const override { return true; }
 
   protected:
     SDValue getGlobalReg(SelectionDAG &DAG, EVT Ty) const;
@@ -390,8 +392,8 @@ class TargetRegisterClass;
           DAG.getLoad(Ty, DL, DAG.getEntryNode(), GOT,
                       MachinePointerInfo::getGOT(DAG.getMachineFunction()));
       unsigned LoFlag = IsN32OrN64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO;
-      SDValue Lo = DAG.getNode(MipsISD::Lo, DL, Ty,
-                               getTargetNode(N, Ty, DAG, LoFlag));
+      SDValue Lo =
+          DAG.getNode(MipsISD::Lo, DL, Ty, getTargetNode(N, Ty, DAG, LoFlag));
       return DAG.getNode(ISD::ADD, DL, Ty, Load, Lo);
     }
 
diff --git a/llvm/test/CodeGen/Mips/fp16-promote.ll b/llvm/test/CodeGen/Mips/fp16-promote.ll
index 6cbfab5f776698..e6e39c0f1b5aaa 100644
--- a/llvm/test/CodeGen/Mips/fp16-promote.ll
+++ b/llvm/test/CodeGen/Mips/fp16-promote.ll
@@ -62,8 +62,8 @@ define <4 x float> @test_vec_fpext_float(ptr %p) #0 {
 ; CHECK-LIBCALL-LABEL: test_vec_fpext_double:
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
-; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: cvt.d.s
+; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: cvt.d.s
 ; CHECK-LIBCALL: cvt.d.s
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)