[llvm] 8f21459 - [SimplifyCFG] Add additional store speculation tests (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 26 07:20:15 PDT 2024
Author: Nikita Popov
Date: 2024-09-26T16:20:06+02:00
New Revision: 8f214597775ef86c9647085f5532948f7f53c794
URL: https://github.com/llvm/llvm-project/commit/8f214597775ef86c9647085f5532948f7f53c794
DIFF: https://github.com/llvm/llvm-project/commit/8f214597775ef86c9647085f5532948f7f53c794.diff
LOG: [SimplifyCFG] Add additional store speculation tests (NFC)
Added:
Modified:
llvm/test/Transforms/SimplifyCFG/speculate-store.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SimplifyCFG/speculate-store.ll b/llvm/test/Transforms/SimplifyCFG/speculate-store.ll
index c7ebeff5246d63..d6da9fd8ae20cb 100644
--- a/llvm/test/Transforms/SimplifyCFG/speculate-store.ll
+++ b/llvm/test/Transforms/SimplifyCFG/speculate-store.ll
@@ -194,6 +194,165 @@ if.end:
ret i32 %add
}
+define i64 @load_before_store_noescape_byval(ptr byval([2 x i32]) %a, i64 %i, i32 %b) {
+; CHECK-LABEL: @load_before_store_noescape_byval(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: store i64 -1, ptr [[A:%.*]], align 8
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 0, i64 [[I:%.*]]
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[V]], [[B:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: store i32 [[B]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: br label [[IF_END]]
+; CHECK: if.end:
+; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[A]], align 8
+; CHECK-NEXT: ret i64 [[V2]]
+;
+entry:
+ store i64 -1, ptr %a, align 8
+ %arrayidx = getelementptr inbounds [2 x i32], ptr %a, i64 0, i64 %i
+ %v = load i32, ptr %arrayidx, align 4
+ %cmp = icmp slt i32 %v, %b
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ store i32 %b, ptr %arrayidx, align 4
+ br label %if.end
+
+if.end:
+ %v2 = load i64, ptr %a, align 8
+ ret i64 %v2
+}
+
+declare noalias ptr @malloc(i64 %size)
+
+define i64 @load_before_store_noescape_malloc(i64 %i, i32 %b) {
+; CHECK-LABEL: @load_before_store_noescape_malloc(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = call ptr @malloc(i64 8)
+; CHECK-NEXT: store i64 -1, ptr [[A]], align 8
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 0, i64 [[I:%.*]]
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[V]], [[B:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: store i32 [[B]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: br label [[IF_END]]
+; CHECK: if.end:
+; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[A]], align 8
+; CHECK-NEXT: ret i64 [[V2]]
+;
+entry:
+ %a = call ptr @malloc(i64 8)
+ store i64 -1, ptr %a, align 8
+ %arrayidx = getelementptr inbounds [2 x i32], ptr %a, i64 0, i64 %i
+ %v = load i32, ptr %arrayidx, align 4
+ %cmp = icmp slt i32 %v, %b
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ store i32 %b, ptr %arrayidx, align 4
+ br label %if.end
+
+if.end:
+ %v2 = load i64, ptr %a, align 8
+ ret i64 %v2
+}
+
+define i64 @load_before_store_noescape_writable(ptr noalias writable dereferenceable(8) %a, i64 %i, i32 %b) {
+; CHECK-LABEL: @load_before_store_noescape_writable(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: store i64 -1, ptr [[A:%.*]], align 8
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 0, i64 1
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[V]], [[B:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: store i32 [[B]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: br label [[IF_END]]
+; CHECK: if.end:
+; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[A]], align 8
+; CHECK-NEXT: ret i64 [[V2]]
+;
+entry:
+ store i64 -1, ptr %a, align 8
+ %arrayidx = getelementptr inbounds [2 x i32], ptr %a, i64 0, i64 1
+ %v = load i32, ptr %arrayidx, align 4
+ %cmp = icmp slt i32 %v, %b
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ store i32 %b, ptr %arrayidx, align 4
+ br label %if.end
+
+if.end:
+ %v2 = load i64, ptr %a, align 8
+ ret i64 %v2
+}
+
+define i64 @load_before_store_noescape_writable_missing_noalias(ptr writable dereferenceable(8) %a, i64 %i, i32 %b) {
+; CHECK-LABEL: @load_before_store_noescape_writable_missing_noalias(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: store i64 -1, ptr [[A:%.*]], align 8
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 0, i64 1
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[V]], [[B:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: store i32 [[B]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: br label [[IF_END]]
+; CHECK: if.end:
+; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[A]], align 8
+; CHECK-NEXT: ret i64 [[V2]]
+;
+entry:
+ store i64 -1, ptr %a, align 8
+ %arrayidx = getelementptr inbounds [2 x i32], ptr %a, i64 0, i64 1
+ %v = load i32, ptr %arrayidx, align 4
+ %cmp = icmp slt i32 %v, %b
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ store i32 %b, ptr %arrayidx, align 4
+ br label %if.end
+
+if.end:
+ %v2 = load i64, ptr %a, align 8
+ ret i64 %v2
+}
+
+define i64 @load_before_store_noescape_writable_missing_derefable(ptr noalias writable %a, i64 %i, i32 %b) {
+; CHECK-LABEL: @load_before_store_noescape_writable_missing_derefable(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: store i64 -1, ptr [[A:%.*]], align 8
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 0, i64 1
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[V]], [[B:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: store i32 [[B]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: br label [[IF_END]]
+; CHECK: if.end:
+; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[A]], align 8
+; CHECK-NEXT: ret i64 [[V2]]
+;
+entry:
+ store i64 -1, ptr %a, align 8
+ %arrayidx = getelementptr inbounds [2 x i32], ptr %a, i64 0, i64 1
+ %v = load i32, ptr %arrayidx, align 4
+ %cmp = icmp slt i32 %v, %b
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ store i32 %b, ptr %arrayidx, align 4
+ br label %if.end
+
+if.end:
+ %v2 = load i64, ptr %a, align 8
+ ret i64 %v2
+}
+
declare void @fork_some_threads(ptr);
declare void @join_some_threads();
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