[llvm] [RISCV] Allow hoisting VXRM writes out of loops speculatively (PR #110044)
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Thu Sep 26 06:45:19 PDT 2024
JeffreyALaw wrote:
So pondering this overnight, obviously it's up to y'all what to do for LLVM around this specific patch.
However it does seem clear to me that we're going to have designs with wildly different performance characteristics for VXRM assignments and thus selecting vaaddu and friends really needs to be a micro-arch tuning decision. I'll have to get the ball rolling on that for GCC.
https://github.com/llvm/llvm-project/pull/110044
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