[llvm] Reland "[NVPTX] deprecate nvvm.rotate.* intrinsics, cleanup funnel-shift handling" (PR #110025)

[Artem Belevich via llvm-commits]

Artem-B wrote:

> In LLVM IR the high bits are the first arg and the low bits are the second arg, while in PTX this is reversed.

Oh. OH. Ouch!

Indeed: https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#logic-and-shift-instructions-shf
>  `shf.l.mode.b32  d, a, b, c;`  // left shift
> ...
> Operand `b` holds bits 63:32 and operand `a` holds bits 31:0 of the 64-bit source value.


https://github.com/llvm/llvm-project/pull/110025