[llvm] [RISCV][MC] Support Assembling 48- and 64-bit Instructions (PR #110022)

Jessica Clarke via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 25 11:31:47 PDT 2024

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jrtc27 wrote:

As far as I know the encoding for >32-bit instructions is not ratified, nor even stable/frozen. Has that changed recently?

https://github.com/llvm/llvm-project/pull/110022

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