[llvm] Reland "[AMDGPU][GlobalIsel] Use isRegisterClassType for G_FREEZE and G_IMPLICIT_DEF (#101331)" (PR #109958)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `lld-x86_64-ubuntu-fast` running on `as-builder-4` while building `llvm` at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/33/builds/3700

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
RUN: at line 2: /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/bin/llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*'  -o - /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir | /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/bin/FileCheck -check-prefix=GCN  /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir
+ /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/bin/llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=2 '-pass-remarks-missed=gisel*' -o - /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir
+ /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/bin/FileCheck -check-prefix=GCN /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir
remark: <unknown>:0:0: cannot select: %5:sgpr_96(<3 x s32>), %6:sgpr_96(<3 x s32>), %7:sgpr_96(<3 x s32>), %8:sgpr_96(<3 x s32>) = G_UNMERGE_VALUES %4:sgpr_384(<12 x s32>) (in function: test_unmerge_s_v3s32_s_v12s32)
/home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir:174:14: error: GCN-NEXT: expected string not found in input
 ; GCN-NEXT: [[DEF:%[0-9]+]]:sgpr(s192) = G_IMPLICIT_DEF
             ^
<stdin>:968:2: note: scanning from here
 
 ^
<stdin>:969:2: note: possible intended match here
 %0:sgpr_192 = IMPLICIT_DEF
 ^

Input file: <stdin>
Check file: /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            .
            .
            .
          963:  longBranchReservedReg: '' 
          964:  hasInitWholeWave: false 
          965: body: | 
          966:  bb.0: 
          967:  liveins: $sgpr0_sgpr1_sgpr2_sgpr3 
          968:   
next:174'0      X error: no match found
          969:  %0:sgpr_192 = IMPLICIT_DEF 
next:174'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:174'1      ?                           possible intended match
          970:  %1:sreg_64 = COPY %0.sub0_sub1 
next:174'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          971:  %2:sreg_64 = COPY %0.sub2_sub3 
next:174'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          972:  %3:sreg_64 = COPY %0.sub4_sub5 
next:174'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          973:  S_ENDPGM 0, implicit %1, implicit %2, implicit %3 
next:174'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          974:  
next:174'0     ~
            .
...

```

</details>

https://github.com/llvm/llvm-project/pull/109958