[llvm] [AMDGPU][SIPreEmitPeephole] mustRetainExeczBranch: use BranchProbability and TargetSchedmodel (PR #109818)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 25 04:06:48 PDT 2024
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= <juamarti at amd.com>,
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= <juamarti at amd.com>
Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/109818 at github.com>
================
@@ -305,10 +310,53 @@ bool SIPreEmitPeephole::getBlockDestinations(
}
bool SIPreEmitPeephole::mustRetainExeczBranch(
- const MachineBasicBlock &From, const MachineBasicBlock &To) const {
+ const MachineBasicBlock &Head, const MachineBasicBlock &From,
+ const MachineBasicBlock &To) const {
+
+ auto FromIt = find(Head.successors(), &From);
+ assert(FromIt != Head.succ_end());
+ BranchProbability ExecNZProb = Head.getSuccProbability(FromIt);
+
unsigned NumInstr = 0;
- const MachineFunction *MF = From.getParent();
+ unsigned long ExecNZBranchCost = 0;
+ unsigned long UnconditionalBranchCost = 0;
+ unsigned long N = 0;
+ unsigned long D = 0;
+ unsigned long ThenCyclesCost = 0;
+
+ std::function<bool(const MachineInstr &)> IsProfitable =
+ [&](const MachineInstr &MI) {
+ ++NumInstr;
+ if (NumInstr >= SkipThreshold)
+ return false;
+ // These instructions are potentially expensive even if EXEC = 0.
+ if (TII->isSMRD(MI) || TII->isVMEM(MI) || TII->isFLAT(MI) ||
+ TII->isDS(MI) || TII->isWaitcnt(MI.getOpcode()))
----------------
arsenm wrote:
Yes, both. As separate changes
https://github.com/llvm/llvm-project/pull/109818
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