[llvm] d853ade - [MIR] Fix return value when computed properties conflict with given prop (#109923)

[via llvm-commits]

Author: Dominik Montada
Date: 2024-09-25T10:47:14+02:00
New Revision: d853adee004dcee7d5a4984539c07f08394cf2b4

URL: https://github.com/llvm/llvm-project/commit/d853adee004dcee7d5a4984539c07f08394cf2b4
DIFF: https://github.com/llvm/llvm-project/commit/d853adee004dcee7d5a4984539c07f08394cf2b4.diff

LOG: [MIR] Fix return value when computed properties conflict with given prop (#109923)

This fixes a test failure when expensive checks are enabled. Use the
correct return value when computing machine function properties resulted
in an error (e.g. when conflicting with explicitly set values).

Without this, the machine verifier would crash even in the presence of
parsing errors which should have gently terminated execution.

Added: 
    llvm/test/CodeGen/MIR/Generic/machine-function-isssa-conflict.mir
    llvm/test/CodeGen/MIR/Generic/machine-function-nophis-conflict.mir
    llvm/test/CodeGen/MIR/Generic/machine-function-novregs-conflict.mir

Modified: 
    llvm/lib/CodeGen/MIRParser/MIRParser.cpp

Removed: 
    llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties-conflict.mir


################################################################################
diff  --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index 3a00b8ec4771dd..be07fbf478b1d8 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -625,10 +625,10 @@ MIRParserImpl::initializeMachineFunction(const yaml::MachineFunction &YamlMF,
   MRI.freezeReservedRegs();
 
   if (computeFunctionProperties(MF, YamlMF))
-    return false;
+    return true;
 
   if (initializeCallSiteInfo(PFS, YamlMF))
-    return false;
+    return true;
 
   setupDebugValueTracking(MF, PFS, YamlMF);
 

diff  --git a/llvm/test/CodeGen/MIR/Generic/machine-function-isssa-conflict.mir b/llvm/test/CodeGen/MIR/Generic/machine-function-isssa-conflict.mir
new file mode 100644
index 00000000000000..362d54db7033fe
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/Generic/machine-function-isssa-conflict.mir
@@ -0,0 +1,14 @@
+# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+
+# Test that computed properties are not conflicting with explicitly set
+# properties
+
+---
+# CHECK: error: {{.*}}: TestIsSSAOverrideConflict has explicit property IsSSA, but is not valid SSA
+name:            TestIsSSAOverrideConflict
+isSSA: true
+body: |
+  bb.0:
+    %0:_(s32) = G_IMPLICIT_DEF
+    %0:_(s32) = G_IMPLICIT_DEF
+...

diff  --git a/llvm/test/CodeGen/MIR/Generic/machine-function-nophis-conflict.mir b/llvm/test/CodeGen/MIR/Generic/machine-function-nophis-conflict.mir
new file mode 100644
index 00000000000000..c113ea59a90496
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/Generic/machine-function-nophis-conflict.mir
@@ -0,0 +1,18 @@
+# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+
+# Test that computed properties are not conflicting with explicitly set
+# properties
+
+---
+# CHECK: error: {{.*}}: TestNoPhisOverrideConflict has explicit property NoPhi, but contains at least one PHI
+name:            TestNoPhisOverrideConflict
+noPhis: true
+tracksRegLiveness: true
+body: |
+  bb.0:
+    %0:_(s32) = G_IMPLICIT_DEF
+
+  bb.1:
+    %1:_(s32) = PHI %0, %bb.0, %1, %bb.1
+    G_BR %bb.1
+...

diff  --git a/llvm/test/CodeGen/MIR/Generic/machine-function-novregs-conflict.mir b/llvm/test/CodeGen/MIR/Generic/machine-function-novregs-conflict.mir
new file mode 100644
index 00000000000000..5f394a4bbbdb62
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/Generic/machine-function-novregs-conflict.mir
@@ -0,0 +1,13 @@
+# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+
+# Test that computed properties are not conflicting with explicitly set
+# properties
+
+---
+# CHECK: error: {{.*}}: TestNoVRegsOverrideConflict has explicit property NoVRegs, but contains virtual registers
+name:            TestNoVRegsOverrideConflict
+noVRegs: true
+body: |
+  bb.0:
+    %0:_(s32) = G_IMPLICIT_DEF
+...

diff  --git a/llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties-conflict.mir b/llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties-conflict.mir
deleted file mode 100644
index d8d178d90ae0af..00000000000000
--- a/llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties-conflict.mir
+++ /dev/null
@@ -1,35 +0,0 @@
-# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
-
-# Test that computed properties are not conflicting with explicitly set
-# properties
-
----
-# CHECK: error: {{.*}}: TestNoPhisOverrideConflict has explicit property NoPhi, but contains at least one PHI
-name:            TestNoPhisOverrideConflict
-noPhis: true
-tracksRegLiveness: true
-body: |
-  bb.0:
-    %0:_(s32) = G_IMPLICIT_DEF
-
-  bb.1:
-    %1:_(s32) = PHI %0, %bb.0, %1, %bb.1
-    G_BR %bb.1
-...
----
-# CHECK: error: {{.*}}: TestIsSSAOverrideConflict has explicit property IsSSA, but is not valid SSA
-name:            TestIsSSAOverrideConflict
-isSSA: true
-body: |
-  bb.0:
-    %0:_(s32) = G_IMPLICIT_DEF
-    %0:_(s32) = G_IMPLICIT_DEF
-...
----
-# CHECK: error: {{.*}}: TestNoVRegsOverrideConflict has explicit property NoVRegs, but contains virtual registers
-name:            TestNoVRegsOverrideConflict
-noVRegs: true
-body: |
-  bb.0:
-    %0:_(s32) = G_IMPLICIT_DEF
-...