[llvm] [MIR] Fix return value when computed properties conflict with given prop (PR #109923)

[Dominik Montada via llvm-commits]

https://github.com/gargaroff created https://github.com/llvm/llvm-project/pull/109923

This fixes a test failure when expensive checks are enabled. Use the correct return value when computing machine function properties resulted in an error (e.g. when conflicting with explicitly set values).

Without this, the machine verifier would crash even in the presence of parsing errors which should have gently terminated execution.

>From 02aedf56436e7262edcbb8195cf37c4dbbf0b814 Mon Sep 17 00:00:00 2001
From: Dominik Montada <dominik.montada at arm.com>
Date: Wed, 25 Sep 2024 09:47:02 +0200
Subject: [PATCH] [MIR] Fix return value when computed properties conflict with
 given prop

This fixes a test failure when expensive checks are enabled.
Use the correct return value when computing machine function properties
resulted in an error (e.g. when conflicting with explicitly set values).

Without this, the machine verifier would crash even in the presence of
parsing errors which should have gently terminated execution.
---
 llvm/lib/CodeGen/MIRParser/MIRParser.cpp      |  4 +--
 .../machine-function-isssa-conflict.mir       | 14 ++++++++
 .../machine-function-nophis-conflict.mir      | 18 ++++++++++
 .../machine-function-novregs-conflict.mir     | 13 +++++++
 ...ptionally-computed-properties-conflict.mir | 35 -------------------
 5 files changed, 47 insertions(+), 37 deletions(-)
 create mode 100644 llvm/test/CodeGen/MIR/Generic/machine-function-isssa-conflict.mir
 create mode 100644 llvm/test/CodeGen/MIR/Generic/machine-function-nophis-conflict.mir
 create mode 100644 llvm/test/CodeGen/MIR/Generic/machine-function-novregs-conflict.mir
 delete mode 100644 llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties-conflict.mir

diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index 3a00b8ec4771dd..be07fbf478b1d8 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -625,10 +625,10 @@ MIRParserImpl::initializeMachineFunction(const yaml::MachineFunction &YamlMF,
   MRI.freezeReservedRegs();
 
   if (computeFunctionProperties(MF, YamlMF))
-    return false;
+    return true;
 
   if (initializeCallSiteInfo(PFS, YamlMF))
-    return false;
+    return true;
 
   setupDebugValueTracking(MF, PFS, YamlMF);
 
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-function-isssa-conflict.mir b/llvm/test/CodeGen/MIR/Generic/machine-function-isssa-conflict.mir
new file mode 100644
index 00000000000000..362d54db7033fe
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/Generic/machine-function-isssa-conflict.mir
@@ -0,0 +1,14 @@
+# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+
+# Test that computed properties are not conflicting with explicitly set
+# properties
+
+---
+# CHECK: error: {{.*}}: TestIsSSAOverrideConflict has explicit property IsSSA, but is not valid SSA
+name:            TestIsSSAOverrideConflict
+isSSA: true
+body: |
+  bb.0:
+    %0:_(s32) = G_IMPLICIT_DEF
+    %0:_(s32) = G_IMPLICIT_DEF
+...
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-function-nophis-conflict.mir b/llvm/test/CodeGen/MIR/Generic/machine-function-nophis-conflict.mir
new file mode 100644
index 00000000000000..c113ea59a90496
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/Generic/machine-function-nophis-conflict.mir
@@ -0,0 +1,18 @@
+# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+
+# Test that computed properties are not conflicting with explicitly set
+# properties
+
+---
+# CHECK: error: {{.*}}: TestNoPhisOverrideConflict has explicit property NoPhi, but contains at least one PHI
+name:            TestNoPhisOverrideConflict
+noPhis: true
+tracksRegLiveness: true
+body: |
+  bb.0:
+    %0:_(s32) = G_IMPLICIT_DEF
+
+  bb.1:
+    %1:_(s32) = PHI %0, %bb.0, %1, %bb.1
+    G_BR %bb.1
+...
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-function-novregs-conflict.mir b/llvm/test/CodeGen/MIR/Generic/machine-function-novregs-conflict.mir
new file mode 100644
index 00000000000000..5f394a4bbbdb62
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/Generic/machine-function-novregs-conflict.mir
@@ -0,0 +1,13 @@
+# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+
+# Test that computed properties are not conflicting with explicitly set
+# properties
+
+---
+# CHECK: error: {{.*}}: TestNoVRegsOverrideConflict has explicit property NoVRegs, but contains virtual registers
+name:            TestNoVRegsOverrideConflict
+noVRegs: true
+body: |
+  bb.0:
+    %0:_(s32) = G_IMPLICIT_DEF
+...
diff --git a/llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties-conflict.mir b/llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties-conflict.mir
deleted file mode 100644
index d8d178d90ae0af..00000000000000
--- a/llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties-conflict.mir
+++ /dev/null
@@ -1,35 +0,0 @@
-# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
-
-# Test that computed properties are not conflicting with explicitly set
-# properties
-
----
-# CHECK: error: {{.*}}: TestNoPhisOverrideConflict has explicit property NoPhi, but contains at least one PHI
-name:            TestNoPhisOverrideConflict
-noPhis: true
-tracksRegLiveness: true
-body: |
-  bb.0:
-    %0:_(s32) = G_IMPLICIT_DEF
-
-  bb.1:
-    %1:_(s32) = PHI %0, %bb.0, %1, %bb.1
-    G_BR %bb.1
-...
----
-# CHECK: error: {{.*}}: TestIsSSAOverrideConflict has explicit property IsSSA, but is not valid SSA
-name:            TestIsSSAOverrideConflict
-isSSA: true
-body: |
-  bb.0:
-    %0:_(s32) = G_IMPLICIT_DEF
-    %0:_(s32) = G_IMPLICIT_DEF
-...
----
-# CHECK: error: {{.*}}: TestNoVRegsOverrideConflict has explicit property NoVRegs, but contains virtual registers
-name:            TestNoVRegsOverrideConflict
-noVRegs: true
-body: |
-  bb.0:
-    %0:_(s32) = G_IMPLICIT_DEF
-...