[llvm] [LLVM][TableGen] Adopt !listflatten for Intrinsic type signature (PR #109884)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-ir

Author: Rahul Joshi (jurahul)

<details>
<summary>Changes</summary>

Intrinisc type signature is a `list<list<int>>` that hold IIT encoding for each param/ret type (outer list) where the IIT encoding for each type itself can be 0 or more integers (the inner list). Intrinsic emitter flatten this list into generate the type signature in `ComputeTypeSignature`.

Use the new !listflatten() operator to instead flatten the list in the TableGen definition and eliminate flattening in the emitter code.

Verified that `-gen-intrinsic-impl` output for Intrinsics.td is identical with and without the change.

---
Full diff: https://github.com/llvm/llvm-project/pull/109884.diff


2 Files Affected:

- (modified) llvm/include/llvm/IR/Intrinsics.td (+2-2) 
- (modified) llvm/utils/TableGen/IntrinsicEmitter.cpp (+3-5) 


``````````diff
diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index 0a74a217a5f010..1bc66d919bf7df 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -626,7 +626,7 @@ class TypeInfoGen<
   list<LLVMType> Types = !foreach(ty, AllTypes,
     !if(!isa<LLVMMatchType>(ty), ACTys[MappingRIdxs[ty.Number]], ty));
 
-  list<list<int>> TypeSig = !listconcat(
+  list<int> TypeSig = !listflatten(!listconcat(
     [IIT_RetNumbers[!size(RetTypes)]],
     !foreach(i, !range(AllTypes),
       !foreach(a, AllTypes[i].Sig,
@@ -634,7 +634,7 @@ class TypeInfoGen<
           MappingRIdxs,
           ArgCodes,
           ACIdxs[i],
-          a>.ret)));
+          a>.ret))));
 }
 
 //===----------------------------------------------------------------------===//
diff --git a/llvm/utils/TableGen/IntrinsicEmitter.cpp b/llvm/utils/TableGen/IntrinsicEmitter.cpp
index 51c2e9a12e00cf..efa067e60de439 100644
--- a/llvm/utils/TableGen/IntrinsicEmitter.cpp
+++ b/llvm/utils/TableGen/IntrinsicEmitter.cpp
@@ -276,12 +276,10 @@ using TypeSigTy = SmallVector<unsigned char>;
 static TypeSigTy ComputeTypeSignature(const CodeGenIntrinsic &Int) {
   TypeSigTy TypeSig;
   const Record *TypeInfo = Int.TheDef->getValueAsDef("TypeInfo");
-  const ListInit *OuterList = TypeInfo->getValueAsListInit("TypeSig");
+  const ListInit *TypeList = TypeInfo->getValueAsListInit("TypeSig");
 
-  for (const auto *Outer : OuterList->getValues()) {
-    for (const auto *Inner : cast<ListInit>(Outer)->getValues())
-      TypeSig.emplace_back(cast<IntInit>(Inner)->getValue());
-  }
+  for (const auto *TypeListEntry : TypeList->getValues())
+    TypeSig.emplace_back(cast<IntInit>(TypeListEntry)->getValue());
   return TypeSig;
 }
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/109884