[llvm] [Xtensa] Add basic support for inline asm constraints. (PR #108986)

Andrei Safronov via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 24 15:35:51 PDT 2024


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@@ -0,0 +1,29 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc -mtriple=xtensa -verify-machineinstrs < %s \
+; RUN: | FileCheck -check-prefix=XTENSA %s
+
+ at gi = external global i32
+
+define i32 @constraint_r(i32 %a) {
+; XTENSA-LABEL: constraint_r:
+; XTENSA:         l32r a8, .LCPI0_0
+; XTENSA-NEXT:    l32i a8, a8, 0
+; XTENSA-NEXT:    #APP
+; XTENSA-NEXT:    add a2, a2, a8
+; XTENSA-NEXT:    #NO_APP
+; XTENSA-NEXT:    ret
+  %1 = load i32, i32* @gi
----------------
andreisfr wrote:

Fixed

https://github.com/llvm/llvm-project/pull/108986


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