[llvm] Question: What is the correct interpretation of LaneBitmask? (PR #109797)
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Tue Sep 24 06:11:17 PDT 2024
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git-clang-format --diff 3c83102f0615c7d66f6df698ca472ddbf0e9483d 0f1ed85616670fe321918f199a9e9baedc50d578 --extensions cpp,h -- llvm/lib/CodeGen/TargetRegisterInfo.cpp llvm/lib/Target/AArch64/AArch64Subtarget.h
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diff --git a/llvm/lib/CodeGen/TargetRegisterInfo.cpp b/llvm/lib/CodeGen/TargetRegisterInfo.cpp
index e62cdf7765..f4a2feac7c 100644
--- a/llvm/lib/CodeGen/TargetRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/TargetRegisterInfo.cpp
@@ -552,9 +552,10 @@ bool TargetRegisterInfo::getCoveringSubRegIndexes(
//
// Which interpretation is correct?
//
- // A) If the meaning is 'if the bits are equal, the sub-registers overlap but
- // not necessarily fully', then we should fix the code in this function (in
- // a better way than just disabling it).
+ // A) If the meaning is 'if the bits are equal, the sub-registers overlap
+ // but
+ // not necessarily fully', then we should fix the code in this function
+ // (in a better way than just disabling it).
//
// B) If the meaning is 'if the bits are equal, the sub-registers overlap
// fully', then we can define the high bits with an artificial register.
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https://github.com/llvm/llvm-project/pull/109797
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