[llvm] [AMDGPU] Fix has_single_bit assertion for Mask in SIInstrInfo (PR #109785)

Georgi Mirazchiyski via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 24 04:46:45 PDT 2024


https://github.com/GeorgeWeb created https://github.com/llvm/llvm-project/pull/109785

Convert the `int64_t` Mask to `uint64_t` for `llvm::has_single_bit` to compile.

>From 878068081d4f0197330cd15fa8e115e345060be8 Mon Sep 17 00:00:00 2001
From: Georgi Mirazchiyski <georgi.mirazchiyski at codeplay.com>
Date: Tue, 24 Sep 2024 12:43:51 +0100
Subject: [PATCH] [AMDGPU] Fix has_single_bit assertion for Mask in SIInstrInfo

Convert the int64_t Mask to uint64_t for llvm::has_single_bit to compile.
---
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index f5f367b2a4a7c6..9ad0b4c65e1d90 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -9793,7 +9793,7 @@ bool SIInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
 
     // A valid Mask is required to have a single bit set, hence a non-zero and
     // power-of-two value. This verifies that we will not do 64-bit shift below.
-    assert(llvm::has_single_bit(Mask) && "Invalid mask.");
+    assert(llvm::has_single_bit<uint64_t>(Mask) && "Invalid mask.");
     unsigned BitNo = llvm::countr_zero((uint64_t)Mask);
     if (IsSigned && BitNo == SrcSize - 1)
       return false;



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