[llvm] [AMDGPU][NFC] Update comment referring to SIRemoveShortExecBranches pass (PR #109756)

via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 24 00:14:47 PDT 2024


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Fabian Ritter (ritter-x2a)

<details>
<summary>Changes</summary>

That pass no longer exists, since 5df2af8b0ef33f48b1ee72bcd27bc609b898da52 has merged it into SIPreEmitPeephole.

---
Full diff: https://github.com/llvm/llvm-project/pull/109756.diff


1 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp (+1-1) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp b/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
index 99c7d2b306789a..5b74022457c261 100644
--- a/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
+++ b/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
@@ -270,7 +270,7 @@ void SILowerControlFlow::emitIf(MachineInstr &MI) {
   I = skipToUncondBrOrEnd(MBB, I);
 
   // Insert the S_CBRANCH_EXECZ instruction which will be optimized later
-  // during SIRemoveShortExecBranches.
+  // during SIPreEmitPeephole.
   MachineInstr *NewBr = BuildMI(MBB, I, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ))
                             .add(MI.getOperand(2));
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/109756


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