[llvm] [AMDGPU][NFC] Update comment referring to SIRemoveShortExecBranches pass (PR #109756)

[Fabian Ritter via llvm-commits]

https://github.com/ritter-x2a created https://github.com/llvm/llvm-project/pull/109756

That pass no longer exists, since 5df2af8b0ef33f48b1ee72bcd27bc609b898da52 has merged it into SIPreEmitPeephole.

>From 65a4d91706ea2f5fbcfdac8346f65a274a2c7330 Mon Sep 17 00:00:00 2001
From: Fabian Ritter <fabian.ritter at amd.com>
Date: Tue, 24 Sep 2024 02:36:33 -0400
Subject: [PATCH] [AMDGPU][NFC] Update comment referring to
 SIRemoveShortExecBranches pass

That pass no longer exists, since
5df2af8b0ef33f48b1ee72bcd27bc609b898da52 has merged it into
SIPreEmitPeephole.
---
 llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp b/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
index 99c7d2b306789a..5b74022457c261 100644
--- a/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
+++ b/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
@@ -270,7 +270,7 @@ void SILowerControlFlow::emitIf(MachineInstr &MI) {
   I = skipToUncondBrOrEnd(MBB, I);
 
   // Insert the S_CBRANCH_EXECZ instruction which will be optimized later
-  // during SIRemoveShortExecBranches.
+  // during SIPreEmitPeephole.
   MachineInstr *NewBr = BuildMI(MBB, I, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ))
                             .add(MI.getOperand(2));