[llvm] [msan] Add 32-bit platforms support (PR #109284)

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Mon Sep 23 18:32:31 PDT 2024


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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

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git-clang-format --diff 0013f94b24d18ee5c4535763b7d64ccdf4d6fa9e 1f46f528e5ccba9a59edb4c345ccf7a606636b41 --extensions cpp -- llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
index 9efea41d9d..3e8e34aa64 100644
--- a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
@@ -5544,7 +5544,7 @@ struct VarArgPowerPCHelper : public VarArgHelperBase {
   unsigned IntptrSize = DL.getTypeStoreSize(MS.IntptrTy);
 
   VarArgPowerPCHelper(Function &F, MemorySanitizer &MS,
-                        MemorySanitizerVisitor &MSV, unsigned VAListTagSize)
+                      MemorySanitizerVisitor &MSV, unsigned VAListTagSize)
       : VarArgHelperBase(F, MS, MSV, VAListTagSize) {}
 
   void visitCallBase(CallBase &CB, IRBuilder<> &IRB) override {
@@ -5675,14 +5675,14 @@ struct VarArgPowerPCHelper : public VarArgHelperBase {
       // In PPC32 va_list_tag is a struct, whereas in PPC64 it's a pointer
       if (TargetTriple.isPPC64()) {
         RegSaveAreaPtrPtr = IRB.CreateIntToPtr(
-          IRB.CreatePtrToInt(VAListTag, MS.IntptrTy), MS.PtrTy);
+            IRB.CreatePtrToInt(VAListTag, MS.IntptrTy), MS.PtrTy);
       } else {
         RegSaveAreaPtrPtr = IRB.CreateIntToPtr(
             IRB.CreateAdd(IRB.CreatePtrToInt(VAListTag, MS.IntptrTy),
-                          ConstantInt::get(MS.IntptrTy, 8)), MS.PtrTy);
+                          ConstantInt::get(MS.IntptrTy, 8)),
+            MS.PtrTy);
       }
 
-       
       Value *RegSaveAreaPtr = IRB.CreateLoad(MS.PtrTy, RegSaveAreaPtrPtr);
       Value *RegSaveAreaShadowPtr, *RegSaveAreaOriginPtr;
       const Align Alignment = Align(IntptrSize);
@@ -5984,7 +5984,7 @@ struct VarArgI386Helper : public VarArgHelperBase {
   unsigned IntptrSize = DL.getTypeStoreSize(MS.IntptrTy);
 
   VarArgI386Helper(Function &F, MemorySanitizer &MS,
-                        MemorySanitizerVisitor &MSV)
+                   MemorySanitizerVisitor &MSV)
       : VarArgHelperBase(F, MS, MSV, /*VAListTagSize=*/4) {}
 
   void visitCallBase(CallBase &CB, IRBuilder<> &IRB) override {
@@ -6019,8 +6019,8 @@ struct VarArgI386Helper : public VarArgHelperBase {
         Align ArgAlign = Align(IntptrSize);
         VAArgOffset = alignTo(VAArgOffset, ArgAlign);
         if (DL.isBigEndian()) {
-          // Adjusting the shadow for argument with size < IntptrSize to match the
-          // placement of bits in big endian system
+          // Adjusting the shadow for argument with size < IntptrSize to match
+          // the placement of bits in big endian system
           if (ArgSize < IntptrSize)
             VAArgOffset += (IntptrSize - ArgSize);
         }
@@ -6087,7 +6087,8 @@ struct VarArgI386Helper : public VarArgHelperBase {
   }
 };
 
-/// Implementation of VarArgHelper that is used for ARM32, MIPS, RISCV, LoongArch64.
+/// Implementation of VarArgHelper that is used for ARM32, MIPS, RISCV,
+/// LoongArch64.
 struct VarArgGenericHelper : public VarArgHelperBase {
   AllocaInst *VAArgTLSCopy = nullptr;
   Value *VAArgSize = nullptr;
@@ -6095,7 +6096,7 @@ struct VarArgGenericHelper : public VarArgHelperBase {
   unsigned IntptrSize = DL.getTypeStoreSize(MS.IntptrTy);
 
   VarArgGenericHelper(Function &F, MemorySanitizer &MS,
-                     MemorySanitizerVisitor &MSV, const unsigned VAListTagSize)
+                      MemorySanitizerVisitor &MSV, const unsigned VAListTagSize)
       : VarArgHelperBase(F, MS, MSV, VAListTagSize) {}
 
   void visitCallBase(CallBase &CB, IRBuilder<> &IRB) override {
@@ -6174,7 +6175,8 @@ struct VarArgGenericHelper : public VarArgHelperBase {
   }
 };
 
-// ARM32, Loongarch64, MIPS and RISCV share the same calling conventions regarding VAArgs.
+// ARM32, Loongarch64, MIPS and RISCV share the same calling conventions
+// regarding VAArgs.
 using VarArgARM32Helper = VarArgGenericHelper;
 using VarArgRISCVHelper = VarArgGenericHelper;
 using VarArgMIPSHelper = VarArgGenericHelper;
@@ -6223,7 +6225,8 @@ static VarArgHelper *CreateVarArgHelper(Function &Func, MemorySanitizer &Msan,
   }
 
   if (TargetTriple.isPPC32()) {
-    // On PowerPC32 VAListTag is a struct {char, char, i16 padding, char *, char *}
+    // On PowerPC32 VAListTag is a struct {char, char, i16 padding, char *, char
+    // *}
     return new VarArgPowerPCHelper(Func, Msan, Visitor, /*VAListTagSize=*/12);
   }
 
@@ -6248,7 +6251,8 @@ static VarArgHelper *CreateVarArgHelper(Function &Func, MemorySanitizer &Msan,
   }
 
   if (TargetTriple.isLoongArch64()) {
-    return new VarArgLoongArch64Helper(Func, Msan, Visitor, /*VAListTagSize=*/8);
+    return new VarArgLoongArch64Helper(Func, Msan, Visitor,
+                                       /*VAListTagSize=*/8);
   }
 
   return new VarArgNoOpHelper(Func, Msan, Visitor);

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https://github.com/llvm/llvm-project/pull/109284


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