[llvm] [DFAJumpThreading] Handle select unfolding when user phi is not a dir… (PR #109511)
Usman Nadeem via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 23 16:31:09 PDT 2024
https://github.com/UsmanNadeem updated https://github.com/llvm/llvm-project/pull/109511
>From 9f0d042065d05aafebaaf018f0969365d6e0c492 Mon Sep 17 00:00:00 2001
From: "Nadeem, Usman" <mnadeem at quicinc.com>
Date: Fri, 20 Sep 2024 21:02:18 -0700
Subject: [PATCH 1/2] [DFAJumpThreading] Handle select unfolding when user phi
is not a direct successor
Previously the code assumed that the select instruction is defined
in a block that is a direct predecessor of the block where the PHINode
uses it. So, we were hitting an assertion when we tried to access the
def block as an incoming block for the user phi node.
This patch handles that case by using the correct end block
and creating a new phi node that aggregates both the values of the
select in that end block, and then using that new unfolded phi to
overwrite the original user phi node.
Fixes #106083
Change-Id: Ie471994cca232318f74a6e6438efa21e561c2dc0
---
.../Transforms/Scalar/DFAJumpThreading.cpp | 46 ++--
.../dfa-jump-threading-transform.ll | 234 ++++++++++++++++++
2 files changed, 263 insertions(+), 17 deletions(-)
diff --git a/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp b/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
index ef9c264482a640..0e2b5c925a6a7a 100644
--- a/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
+++ b/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
@@ -194,7 +194,6 @@ void unfold(DomTreeUpdater *DTU, LoopInfo *LI, SelectInstToUnfold SIToUnfold,
SelectInst *SI = SIToUnfold.getInst();
PHINode *SIUse = SIToUnfold.getUse();
BasicBlock *StartBlock = SI->getParent();
- BasicBlock *EndBlock = SIUse->getParent();
BranchInst *StartBlockTerm =
dyn_cast<BranchInst>(StartBlock->getTerminator());
@@ -202,6 +201,7 @@ void unfold(DomTreeUpdater *DTU, LoopInfo *LI, SelectInstToUnfold SIToUnfold,
assert(SI->hasOneUse());
if (StartBlockTerm->isUnconditional()) {
+ BasicBlock *EndBlock = StartBlock->getUniqueSuccessor();
// Arbitrarily choose the 'false' side for a new input value to the PHI.
BasicBlock *NewBlock = BasicBlock::Create(
SI->getContext(), Twine(SI->getName(), ".si.unfold.false"),
@@ -223,32 +223,44 @@ void unfold(DomTreeUpdater *DTU, LoopInfo *LI, SelectInstToUnfold SIToUnfold,
NewBlock->getFirstInsertionPt());
NewPhi->addIncoming(SIOp2, StartBlock);
- if (auto *OpSi = dyn_cast<SelectInst>(SIOp1))
- NewSIsToUnfold->push_back(SelectInstToUnfold(OpSi, SIUse));
- if (auto *OpSi = dyn_cast<SelectInst>(SIOp2))
- NewSIsToUnfold->push_back(SelectInstToUnfold(OpSi, NewPhi));
-
- // Update the phi node of SI.
- for (unsigned Idx = 0; Idx < SIUse->getNumIncomingValues(); ++Idx) {
- if (SIUse->getIncomingBlock(Idx) == StartBlock)
- SIUse->setIncomingValue(Idx, SIOp1);
+ // Update any other PHI nodes in EndBlock.
+ for (PHINode &Phi : EndBlock->phis()) {
+ if (SIUse == &Phi)
+ continue;
+ Phi.addIncoming(Phi.getIncomingValueForBlock(StartBlock), NewBlock);
}
- SIUse->addIncoming(NewPhi, NewBlock);
- // Update any other PHI nodes in EndBlock.
- for (auto II = EndBlock->begin(); PHINode *Phi = dyn_cast<PHINode>(II);
- ++II) {
- if (Phi != SIUse)
- Phi->addIncoming(Phi->getIncomingValueForBlock(StartBlock), NewBlock);
+ // Update the phi node of SI, which is its only use.
+ if (EndBlock == SIUse->getParent()) {
+ SIUse->addIncoming(NewPhi, NewBlock);
+ SIUse->replaceUsesOfWith(SI, SIOp1);
+ } else {
+ PHINode *EndPhi = PHINode::Create(SIUse->getType(), pred_size(EndBlock),
+ Twine(SI->getName(), ".si.unfold.phi"),
+ EndBlock->getFirstInsertionPt());
+ for (BasicBlock *Pred : predecessors(EndBlock)) {
+ if (Pred != StartBlock && Pred != NewBlock)
+ EndPhi->addIncoming(EndPhi, Pred);
+ }
+
+ EndPhi->addIncoming(SIOp1, StartBlock);
+ EndPhi->addIncoming(NewPhi, NewBlock);
+ SIUse->replaceUsesOfWith(SI, EndPhi);
+ SIUse = EndPhi;
}
- StartBlockTerm->eraseFromParent();
+ if (auto *OpSi = dyn_cast<SelectInst>(SIOp1))
+ NewSIsToUnfold->push_back(SelectInstToUnfold(OpSi, SIUse));
+ if (auto *OpSi = dyn_cast<SelectInst>(SIOp2))
+ NewSIsToUnfold->push_back(SelectInstToUnfold(OpSi, NewPhi));
// Insert the real conditional branch based on the original condition.
+ StartBlockTerm->eraseFromParent();
BranchInst::Create(EndBlock, NewBlock, SI->getCondition(), StartBlock);
DTU->applyUpdates({{DominatorTree::Insert, StartBlock, EndBlock},
{DominatorTree::Insert, StartBlock, NewBlock}});
} else {
+ BasicBlock *EndBlock = SIUse->getParent();
BasicBlock *NewBlockT = BasicBlock::Create(
SI->getContext(), Twine(SI->getName(), ".si.unfold.true"),
EndBlock->getParent(), EndBlock);
diff --git a/llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll b/llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
index c38f81d0f046ef..b48e10e8d2a96c 100644
--- a/llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
+++ b/llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
@@ -300,3 +300,237 @@ define void @self-reference() {
end:
ret void
}
+
+ at a = external dso_local global ptr, align 8
+ at b = external dso_local global i32, align 4
+ at c = external dso_local global i64, align 8
+ at d = external dso_local global i16, align 2
+ at e = external dso_local global i64, align 8
+ at f = external dso_local global i32, align 4
+ at g = external dso_local global i64, align 8
+ at h = external dso_local global i32, align 4
+ at i = external dso_local global ptr, align 8
+
+define void @pr106083_invalidBBarg_fold() {
+; CHECK-LABEL: @pr106083_invalidBBarg_fold(
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @h, align 4
+; CHECK-NEXT: [[DOTNOT2:%.*]] = icmp eq i32 [[TMP1]], 0
+; CHECK-NEXT: [[D_PROMOTED3:%.*]] = load i16, ptr @d, align 1
+; CHECK-NEXT: br i1 [[DOTNOT2]], label [[BB0:%.*]], label [[DOT_SI_UNFOLD_FALSE:%.*]]
+; CHECK: BB0.loopexit:
+; CHECK-NEXT: [[D_PROMOTED41:%.*]] = phi i16 [ [[D_PROMOTED4_JT2:%.*]], [[BB7_JT2:%.*]] ], [ [[D_PROMOTED4:%.*]], [[BB7:%.*]] ]
+; CHECK-NEXT: br label [[BB0]]
+; CHECK: ..si.unfold.false:
+; CHECK-NEXT: [[DOTSI_UNFOLD_PHI:%.*]] = phi i32 [ 6, [[TMP0:%.*]] ]
+; CHECK-NEXT: br label [[BB0]]
+; CHECK: BB0:
+; CHECK-NEXT: [[D_PROMOTED6:%.*]] = phi i16 [ [[D_PROMOTED3]], [[TMP0]] ], [ [[D_PROMOTED41]], [[BB0_LOOPEXIT:%.*]] ], [ [[D_PROMOTED3]], [[DOT_SI_UNFOLD_FALSE]] ]
+; CHECK-NEXT: [[DOT_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[DOT_SI_UNFOLD_PHI]], [[BB0_LOOPEXIT]] ], [ 0, [[TMP0]] ], [ [[DOTSI_UNFOLD_PHI]], [[DOT_SI_UNFOLD_FALSE]] ]
+; CHECK-NEXT: br label [[BB1_JT2:%.*]]
+; CHECK: BB1:
+; CHECK-NEXT: [[D_PROMOTED5:%.*]] = phi i16 [ [[D_PROMOTED4]], [[BB1_BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[TMP2:%.*]] = phi i16 [ [[TMP10:%.*]], [[BB1_BACKEDGE]] ]
+; CHECK-NEXT: [[DOT1:%.*]] = phi i32 [ [[DOT3:%.*]], [[BB1_BACKEDGE]] ]
+; CHECK-NEXT: [[TMP3:%.*]] = load volatile i32, ptr @f, align 4
+; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0
+; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB7]], label [[BB2:%.*]]
+; CHECK: BB1.jt2:
+; CHECK-NEXT: [[D_PROMOTED5_JT2:%.*]] = phi i16 [ [[D_PROMOTED6]], [[BB0]] ]
+; CHECK-NEXT: [[TMP4:%.*]] = phi i16 [ [[D_PROMOTED6]], [[BB0]] ]
+; CHECK-NEXT: [[DOT1_JT2:%.*]] = phi i32 [ 2, [[BB0]] ]
+; CHECK-NEXT: [[TMP5:%.*]] = load volatile i32, ptr @f, align 4
+; CHECK-NEXT: [[DOTNOT_JT2:%.*]] = icmp eq i32 [[TMP5]], 0
+; CHECK-NEXT: br i1 [[DOTNOT_JT2]], label [[BB7_JT2]], label [[BB2_JT2:%.*]]
+; CHECK: BB2:
+; CHECK-NEXT: [[TMP6:%.*]] = add i16 [[TMP2]], 1
+; CHECK-NEXT: store i16 [[TMP6]], ptr @d, align 2
+; CHECK-NEXT: [[TMP7:%.*]] = load volatile i64, ptr @g, align 8
+; CHECK-NEXT: [[DOTNOT1:%.*]] = icmp eq i64 [[TMP7]], 0
+; CHECK-NEXT: br i1 [[DOTNOT1]], label [[BB7]], label [[SPEC_SELECT_SI_UNFOLD_FALSE:%.*]]
+; CHECK: BB2.jt2:
+; CHECK-NEXT: [[TMP8:%.*]] = add i16 [[TMP4]], 1
+; CHECK-NEXT: store i16 [[TMP8]], ptr @d, align 2
+; CHECK-NEXT: [[TMP9:%.*]] = load volatile i64, ptr @g, align 8
+; CHECK-NEXT: [[DOTNOT1_JT2:%.*]] = icmp eq i64 [[TMP9]], 0
+; CHECK-NEXT: br i1 [[DOTNOT1_JT2]], label [[BB7]], label [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2:%.*]]
+; CHECK: spec.select.si.unfold.false:
+; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[DOT1]], [[BB2]] ]
+; CHECK-NEXT: br label [[BB7]]
+; CHECK: spec.select.si.unfold.false.jt2:
+; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI_JT2:%.*]] = phi i32 [ [[DOT1_JT2]], [[BB2_JT2]] ]
+; CHECK-NEXT: br label [[BB7_JT2]]
+; CHECK: BB7:
+; CHECK-NEXT: [[D_PROMOTED4]] = phi i16 [ [[D_PROMOTED5]], [[BB1:%.*]] ], [ [[TMP6]], [[BB2]] ], [ [[TMP6]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ], [ [[TMP8]], [[BB2_JT2]] ]
+; CHECK-NEXT: [[TMP10]] = phi i16 [ [[TMP2]], [[BB1]] ], [ [[TMP6]], [[BB2]] ], [ [[TMP6]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ], [ [[TMP8]], [[BB2_JT2]] ]
+; CHECK-NEXT: [[DOT3]] = phi i32 [ [[DOT1]], [[BB1]] ], [ [[DOT_SI_UNFOLD_PHI]], [[BB2]] ], [ [[DOT1_SI_UNFOLD_PHI]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ], [ [[DOT_SI_UNFOLD_PHI]], [[BB2_JT2]] ]
+; CHECK-NEXT: switch i32 [[DOT3]], label [[BB9:%.*]] [
+; CHECK-NEXT: i32 0, label [[BB1_BACKEDGE]]
+; CHECK-NEXT: i32 7, label [[BB1_BACKEDGE]]
+; CHECK-NEXT: i32 6, label [[BB8:%.*]]
+; CHECK-NEXT: i32 2, label [[BB0_LOOPEXIT]]
+; CHECK-NEXT: ]
+; CHECK: BB7.jt2:
+; CHECK-NEXT: [[D_PROMOTED4_JT2]] = phi i16 [ [[D_PROMOTED5_JT2]], [[BB1_JT2]] ], [ [[TMP8]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2]] ]
+; CHECK-NEXT: [[TMP11:%.*]] = phi i16 [ [[TMP4]], [[BB1_JT2]] ], [ [[TMP8]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2]] ]
+; CHECK-NEXT: [[DOT3_JT2:%.*]] = phi i32 [ [[DOT1_JT2]], [[BB1_JT2]] ], [ [[DOT1_SI_UNFOLD_PHI_JT2]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2]] ]
+; CHECK-NEXT: br label [[BB0_LOOPEXIT]]
+; CHECK: BB1.backedge:
+; CHECK-NEXT: br label [[BB1]]
+; CHECK: BB8:
+; CHECK-NEXT: ret void
+; CHECK: BB9:
+; CHECK-NEXT: unreachable
+;
+ %1 = load i32, ptr @h, align 4
+ %.not2 = icmp eq i32 %1, 0
+ %. = select i1 %.not2, i32 0, i32 6
+ %d.promoted3 = load i16, ptr @d, align 1
+ br label %BB0
+
+BB0.loopexit: ; preds = %BB7
+ br label %BB0
+
+BB0: ; preds = %BB0.loopexit, %0
+ %d.promoted6 = phi i16 [ %d.promoted3, %0 ], [ %d.promoted4, %BB0.loopexit ]
+ br label %BB1
+
+BB1: ; preds = %BB1.backedge, %BB0
+ %d.promoted5 = phi i16 [ %d.promoted6, %BB0 ], [ %d.promoted4, %BB1.backedge ]
+ %2 = phi i16 [ %d.promoted6, %BB0 ], [ %6, %BB1.backedge ]
+ %.1 = phi i32 [ 2, %BB0 ], [ %.3, %BB1.backedge ]
+ %3 = load volatile i32, ptr @f, align 4
+ %.not = icmp eq i32 %3, 0
+ br i1 %.not, label %BB7, label %BB2
+
+BB2: ; preds = %BB1
+ %4 = add i16 %2, 1
+ store i16 %4, ptr @d, align 2
+ %5 = load volatile i64, ptr @g, align 8
+ %.not1 = icmp eq i64 %5, 0
+ %spec.select = select i1 %.not1, i32 %., i32 %.1
+ br label %BB7
+
+BB7: ; preds = %BB2, %BB1
+ %d.promoted4 = phi i16 [ %d.promoted5, %BB1 ], [ %4, %BB2 ]
+ %6 = phi i16 [ %2, %BB1 ], [ %4, %BB2 ]
+ %.3 = phi i32 [ %.1, %BB1 ], [ %spec.select, %BB2 ]
+ switch i32 %.3, label %BB9 [
+ i32 0, label %BB1.backedge
+ i32 7, label %BB1.backedge
+ i32 6, label %BB8
+ i32 2, label %BB0.loopexit
+ ]
+
+BB1.backedge: ; preds = %BB7, %BB7
+ br label %BB1
+
+BB8: ; preds = %BB7
+ ret void
+
+BB9: ; preds = %BB7
+ unreachable
+}
+
+
+define void @pr106083_select_dead_uses() {
+; CHECK-LABEL: @pr106083_select_dead_uses(
+; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr @a, align 8
+; CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr @i, align 8
+; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr @c, align 8
+; CHECK-NEXT: [[DOTNOT3:%.*]] = icmp eq i64 [[TMP3]], 0
+; CHECK-NEXT: br i1 [[DOTNOT3]], label [[DOTLOOPEXIT6:%.*]], label [[SPEC_SELECT_SI_UNFOLD_FALSE:%.*]]
+; CHECK: .loopexit6.loopexit:
+; CHECK-NEXT: br label [[DOTLOOPEXIT6]]
+; CHECK: spec.select.si.unfold.false:
+; CHECK-NEXT: [[DOTSI_UNFOLD_PHI:%.*]] = phi i32 [ 2, [[TMP0:%.*]] ]
+; CHECK-NEXT: br label [[DOTLOOPEXIT6]]
+; CHECK: .loopexit6:
+; CHECK-NEXT: [[SPEC_SELECT_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[SPEC_SELECT_SI_UNFOLD_PHI]], [[DOTLOOPEXIT6_LOOPEXIT:%.*]] ], [ 0, [[TMP0]] ], [ [[DOTSI_UNFOLD_PHI]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ]
+; CHECK-NEXT: br label [[TMP6:%.*]]
+; CHECK: 4:
+; CHECK-NEXT: [[DOT1:%.*]] = phi i32 [ [[DOT21:%.*]], [[DOTBACKEDGE:%.*]] ]
+; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
+; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP5]], 0
+; CHECK-NEXT: br i1 [[DOTNOT]], label [[SELECT_UNFOLD_JT0:%.*]], label [[TMP8:%.*]]
+; CHECK: 6:
+; CHECK-NEXT: [[DOT1_JT2:%.*]] = phi i32 [ 2, [[DOTLOOPEXIT6]] ]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP1]], align 4
+; CHECK-NEXT: [[DOTNOT_JT2:%.*]] = icmp eq i32 [[TMP7]], 0
+; CHECK-NEXT: br i1 [[DOTNOT_JT2]], label [[SELECT_UNFOLD_JT0]], label [[TMP10:%.*]]
+; CHECK: 8:
+; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP2]], align 4
+; CHECK-NEXT: [[DOTNOT2:%.*]] = icmp eq i32 [[TMP9]], 0
+; CHECK-NEXT: br i1 [[DOTNOT2]], label [[SELECT_UNFOLD:%.*]], label [[SPEC_SELECT7_SI_UNFOLD_FALSE:%.*]]
+; CHECK: 10:
+; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP2]], align 4
+; CHECK-NEXT: [[DOTNOT2_JT2:%.*]] = icmp eq i32 [[TMP11]], 0
+; CHECK-NEXT: br i1 [[DOTNOT2_JT2]], label [[SELECT_UNFOLD]], label [[SPEC_SELECT7_SI_UNFOLD_FALSE_JT2:%.*]]
+; CHECK: spec.select7.si.unfold.false:
+; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[DOT1]], [[TMP8]] ]
+; CHECK-NEXT: br label [[SELECT_UNFOLD]]
+; CHECK: spec.select7.si.unfold.false.jt2:
+; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI_JT2:%.*]] = phi i32 [ [[DOT1_JT2]], [[TMP10]] ]
+; CHECK-NEXT: br label [[SELECT_UNFOLD_JT2:%.*]]
+; CHECK: select.unfold:
+; CHECK-NEXT: [[DOT2:%.*]] = phi i32 [ [[SPEC_SELECT_SI_UNFOLD_PHI]], [[TMP8]] ], [ [[DOT1_SI_UNFOLD_PHI]], [[SPEC_SELECT7_SI_UNFOLD_FALSE]] ], [ [[SPEC_SELECT_SI_UNFOLD_PHI]], [[TMP10]] ]
+; CHECK-NEXT: switch i32 [[DOT2]], label [[TMP12:%.*]] [
+; CHECK-NEXT: i32 0, label [[DOTPREHEADER_PREHEADER:%.*]]
+; CHECK-NEXT: i32 2, label [[DOTLOOPEXIT6_LOOPEXIT]]
+; CHECK-NEXT: ]
+; CHECK: select.unfold.jt2:
+; CHECK-NEXT: [[DOT2_JT2:%.*]] = phi i32 [ [[DOT1_SI_UNFOLD_PHI_JT2]], [[SPEC_SELECT7_SI_UNFOLD_FALSE_JT2]] ]
+; CHECK-NEXT: br label [[DOTLOOPEXIT6_LOOPEXIT]]
+; CHECK: select.unfold.jt0:
+; CHECK-NEXT: [[DOT2_JT0:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ 0, [[TMP6]] ]
+; CHECK-NEXT: br label [[DOTPREHEADER_PREHEADER]]
+; CHECK: .preheader.preheader:
+; CHECK-NEXT: [[DOT21]] = phi i32 [ [[DOT2_JT0]], [[SELECT_UNFOLD_JT0]] ], [ [[DOT2]], [[SELECT_UNFOLD]] ]
+; CHECK-NEXT: store i32 0, ptr @b, align 4
+; CHECK-NEXT: br label [[DOTBACKEDGE]]
+; CHECK: .backedge:
+; CHECK-NEXT: br label [[TMP4]]
+; CHECK: 12:
+; CHECK-NEXT: unreachable
+;
+ %1 = load ptr, ptr @a, align 8
+ %2 = load ptr, ptr @i, align 8
+ %3 = load i64, ptr @c, align 8
+ %.not3 = icmp eq i64 %3, 0
+ %spec.select = select i1 %.not3, i32 0, i32 2
+ br label %.loopexit6
+
+.loopexit6.loopexit: ; preds = %select.unfold
+ br label %.loopexit6
+
+.loopexit6: ; preds = %.loopexit6.loopexit, %0
+ br label %4
+
+4: ; preds = %.backedge, %.loopexit6
+ %.1 = phi i32 [ 2, %.loopexit6 ], [ %.2, %.backedge ]
+ %5 = load i32, ptr %1, align 4
+ %.not = icmp eq i32 %5, 0
+ br i1 %.not, label %select.unfold, label %6
+
+6: ; preds = %4
+ %7 = load i32, ptr %2, align 4
+ %.not2 = icmp eq i32 %7, 0
+ %spec.select7 = select i1 %.not2, i32 %spec.select, i32 %.1
+ br label %select.unfold
+
+select.unfold: ; preds = %6, %4
+ %.2 = phi i32 [ 0, %4 ], [ %spec.select7, %6 ]
+ switch i32 %.2, label %8 [
+ i32 0, label %.preheader.preheader
+ i32 2, label %.loopexit6.loopexit
+ ]
+
+.preheader.preheader: ; preds = %select.unfold
+ store i32 0, ptr @b, align 4
+ br label %.backedge
+
+.backedge: ; preds = %.preheader.preheader
+ br label %4
+
+8: ; preds = %select.unfold
+ unreachable
+}
>From 14071deb4397f32712f63eb606fa93b9ba715881 Mon Sep 17 00:00:00 2001
From: "Nadeem, Usman" <mnadeem at quicinc.com>
Date: Mon, 23 Sep 2024 16:30:52 -0700
Subject: [PATCH 2/2] Reduce tests
Change-Id: I847df2d1e22aebee0a79ffc8f7d57271a0028f65
---
.../dfa-jump-threading-transform.ll | 249 +++++-------------
1 file changed, 69 insertions(+), 180 deletions(-)
diff --git a/llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll b/llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
index b48e10e8d2a96c..cba1ba8dde768e 100644
--- a/llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
+++ b/llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
@@ -301,236 +301,125 @@ end:
ret void
}
- at a = external dso_local global ptr, align 8
- at b = external dso_local global i32, align 4
- at c = external dso_local global i64, align 8
- at d = external dso_local global i16, align 2
- at e = external dso_local global i64, align 8
- at f = external dso_local global i32, align 4
- at g = external dso_local global i64, align 8
- at h = external dso_local global i32, align 4
- at i = external dso_local global ptr, align 8
-
-define void @pr106083_invalidBBarg_fold() {
+define void @pr106083_invalidBBarg_fold(i1 %cmp1, i1 %cmp2, i1 %not, ptr %d) {
; CHECK-LABEL: @pr106083_invalidBBarg_fold(
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @h, align 4
-; CHECK-NEXT: [[DOTNOT2:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[D_PROMOTED3:%.*]] = load i16, ptr @d, align 1
-; CHECK-NEXT: br i1 [[DOTNOT2]], label [[BB0:%.*]], label [[DOT_SI_UNFOLD_FALSE:%.*]]
-; CHECK: BB0.loopexit:
-; CHECK-NEXT: [[D_PROMOTED41:%.*]] = phi i16 [ [[D_PROMOTED4_JT2:%.*]], [[BB7_JT2:%.*]] ], [ [[D_PROMOTED4:%.*]], [[BB7:%.*]] ]
-; CHECK-NEXT: br label [[BB0]]
-; CHECK: ..si.unfold.false:
-; CHECK-NEXT: [[DOTSI_UNFOLD_PHI:%.*]] = phi i32 [ 6, [[TMP0:%.*]] ]
-; CHECK-NEXT: br label [[BB0]]
-; CHECK: BB0:
-; CHECK-NEXT: [[D_PROMOTED6:%.*]] = phi i16 [ [[D_PROMOTED3]], [[TMP0]] ], [ [[D_PROMOTED41]], [[BB0_LOOPEXIT:%.*]] ], [ [[D_PROMOTED3]], [[DOT_SI_UNFOLD_FALSE]] ]
-; CHECK-NEXT: [[DOT_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[DOT_SI_UNFOLD_PHI]], [[BB0_LOOPEXIT]] ], [ 0, [[TMP0]] ], [ [[DOTSI_UNFOLD_PHI]], [[DOT_SI_UNFOLD_FALSE]] ]
-; CHECK-NEXT: br label [[BB1_JT2:%.*]]
+; CHECK-NEXT: bb:
+; CHECK-NEXT: br i1 [[CMP1:%.*]], label [[BB1:%.*]], label [[SEL_SI_UNFOLD_FALSE:%.*]]
+; CHECK: sel.si.unfold.false:
+; CHECK-NEXT: [[DOTSI_UNFOLD_PHI1:%.*]] = phi i32 [ 1, [[BB:%.*]] ]
+; CHECK-NEXT: br label [[BB1]]
; CHECK: BB1:
-; CHECK-NEXT: [[D_PROMOTED5:%.*]] = phi i16 [ [[D_PROMOTED4]], [[BB1_BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[TMP2:%.*]] = phi i16 [ [[TMP10:%.*]], [[BB1_BACKEDGE]] ]
-; CHECK-NEXT: [[DOT1:%.*]] = phi i32 [ [[DOT3:%.*]], [[BB1_BACKEDGE]] ]
-; CHECK-NEXT: [[TMP3:%.*]] = load volatile i32, ptr @f, align 4
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0
-; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB7]], label [[BB2:%.*]]
-; CHECK: BB1.jt2:
-; CHECK-NEXT: [[D_PROMOTED5_JT2:%.*]] = phi i16 [ [[D_PROMOTED6]], [[BB0]] ]
-; CHECK-NEXT: [[TMP4:%.*]] = phi i16 [ [[D_PROMOTED6]], [[BB0]] ]
-; CHECK-NEXT: [[DOT1_JT2:%.*]] = phi i32 [ 2, [[BB0]] ]
-; CHECK-NEXT: [[TMP5:%.*]] = load volatile i32, ptr @f, align 4
-; CHECK-NEXT: [[DOTNOT_JT2:%.*]] = icmp eq i32 [[TMP5]], 0
-; CHECK-NEXT: br i1 [[DOTNOT_JT2]], label [[BB7_JT2]], label [[BB2_JT2:%.*]]
+; CHECK-NEXT: [[I:%.*]] = phi i16 [ 0, [[BB1_BACKEDGE:%.*]] ], [ 0, [[BB]] ], [ 1, [[BB7:%.*]] ], [ 0, [[SEL_SI_UNFOLD_FALSE]] ], [ 1, [[BB7_JT0:%.*]] ]
+; CHECK-NEXT: [[SEL_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[SEL_SI_UNFOLD_PHI]], [[BB1_BACKEDGE]] ], [ [[SEL_SI_UNFOLD_PHI]], [[BB7]] ], [ 0, [[BB]] ], [ [[DOTSI_UNFOLD_PHI1]], [[SEL_SI_UNFOLD_FALSE]] ], [ [[SEL_SI_UNFOLD_PHI]], [[BB7_JT0]] ]
+; CHECK-NEXT: br i1 [[NOT:%.*]], label [[BB7_JT0]], label [[BB2:%.*]]
; CHECK: BB2:
-; CHECK-NEXT: [[TMP6:%.*]] = add i16 [[TMP2]], 1
-; CHECK-NEXT: store i16 [[TMP6]], ptr @d, align 2
-; CHECK-NEXT: [[TMP7:%.*]] = load volatile i64, ptr @g, align 8
-; CHECK-NEXT: [[DOTNOT1:%.*]] = icmp eq i64 [[TMP7]], 0
-; CHECK-NEXT: br i1 [[DOTNOT1]], label [[BB7]], label [[SPEC_SELECT_SI_UNFOLD_FALSE:%.*]]
-; CHECK: BB2.jt2:
-; CHECK-NEXT: [[TMP8:%.*]] = add i16 [[TMP4]], 1
-; CHECK-NEXT: store i16 [[TMP8]], ptr @d, align 2
-; CHECK-NEXT: [[TMP9:%.*]] = load volatile i64, ptr @g, align 8
-; CHECK-NEXT: [[DOTNOT1_JT2:%.*]] = icmp eq i64 [[TMP9]], 0
-; CHECK-NEXT: br i1 [[DOTNOT1_JT2]], label [[BB7]], label [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2:%.*]]
+; CHECK-NEXT: store i16 0, ptr [[D:%.*]], align 2
+; CHECK-NEXT: br i1 [[CMP2:%.*]], label [[BB7]], label [[SPEC_SELECT_SI_UNFOLD_FALSE_JT0:%.*]]
; CHECK: spec.select.si.unfold.false:
-; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[DOT1]], [[BB2]] ]
; CHECK-NEXT: br label [[BB7]]
-; CHECK: spec.select.si.unfold.false.jt2:
-; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI_JT2:%.*]] = phi i32 [ [[DOT1_JT2]], [[BB2_JT2]] ]
-; CHECK-NEXT: br label [[BB7_JT2]]
+; CHECK: spec.select.si.unfold.false.jt0:
+; CHECK-NEXT: [[DOTSI_UNFOLD_PHI_JT0:%.*]] = phi i32 [ 0, [[BB2]] ]
+; CHECK-NEXT: br label [[BB7_JT0]]
; CHECK: BB7:
-; CHECK-NEXT: [[D_PROMOTED4]] = phi i16 [ [[D_PROMOTED5]], [[BB1:%.*]] ], [ [[TMP6]], [[BB2]] ], [ [[TMP6]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ], [ [[TMP8]], [[BB2_JT2]] ]
-; CHECK-NEXT: [[TMP10]] = phi i16 [ [[TMP2]], [[BB1]] ], [ [[TMP6]], [[BB2]] ], [ [[TMP6]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ], [ [[TMP8]], [[BB2_JT2]] ]
-; CHECK-NEXT: [[DOT3]] = phi i32 [ [[DOT1]], [[BB1]] ], [ [[DOT_SI_UNFOLD_PHI]], [[BB2]] ], [ [[DOT1_SI_UNFOLD_PHI]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ], [ [[DOT_SI_UNFOLD_PHI]], [[BB2_JT2]] ]
-; CHECK-NEXT: switch i32 [[DOT3]], label [[BB9:%.*]] [
-; CHECK-NEXT: i32 0, label [[BB1_BACKEDGE]]
-; CHECK-NEXT: i32 7, label [[BB1_BACKEDGE]]
-; CHECK-NEXT: i32 6, label [[BB8:%.*]]
-; CHECK-NEXT: i32 2, label [[BB0_LOOPEXIT]]
+; CHECK-NEXT: [[D_PROMOTED4:%.*]] = phi i16 [ 1, [[BB2]] ], [ 1, [[SPEC_SELECT_SI_UNFOLD_FALSE:%.*]] ]
+; CHECK-NEXT: [[_3:%.*]] = phi i32 [ [[SEL_SI_UNFOLD_PHI]], [[BB2]] ], [ poison, [[SPEC_SELECT_SI_UNFOLD_FALSE]] ]
+; CHECK-NEXT: switch i32 [[_3]], label [[BB1_BACKEDGE]] [
+; CHECK-NEXT: i32 0, label [[BB1]]
+; CHECK-NEXT: i32 1, label [[BB8:%.*]]
; CHECK-NEXT: ]
-; CHECK: BB7.jt2:
-; CHECK-NEXT: [[D_PROMOTED4_JT2]] = phi i16 [ [[D_PROMOTED5_JT2]], [[BB1_JT2]] ], [ [[TMP8]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2]] ]
-; CHECK-NEXT: [[TMP11:%.*]] = phi i16 [ [[TMP4]], [[BB1_JT2]] ], [ [[TMP8]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2]] ]
-; CHECK-NEXT: [[DOT3_JT2:%.*]] = phi i32 [ [[DOT1_JT2]], [[BB1_JT2]] ], [ [[DOT1_SI_UNFOLD_PHI_JT2]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT2]] ]
-; CHECK-NEXT: br label [[BB0_LOOPEXIT]]
+; CHECK: BB7.jt0:
+; CHECK-NEXT: [[D_PROMOTED4_JT0:%.*]] = phi i16 [ 0, [[BB1]] ], [ 1, [[SPEC_SELECT_SI_UNFOLD_FALSE_JT0]] ]
+; CHECK-NEXT: [[_3_JT0:%.*]] = phi i32 [ 0, [[BB1]] ], [ [[DOTSI_UNFOLD_PHI_JT0]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT0]] ]
+; CHECK-NEXT: br label [[BB1]]
; CHECK: BB1.backedge:
; CHECK-NEXT: br label [[BB1]]
; CHECK: BB8:
; CHECK-NEXT: ret void
-; CHECK: BB9:
-; CHECK-NEXT: unreachable
;
- %1 = load i32, ptr @h, align 4
- %.not2 = icmp eq i32 %1, 0
- %. = select i1 %.not2, i32 0, i32 6
- %d.promoted3 = load i16, ptr @d, align 1
- br label %BB0
-
-BB0.loopexit: ; preds = %BB7
- br label %BB0
-
-BB0: ; preds = %BB0.loopexit, %0
- %d.promoted6 = phi i16 [ %d.promoted3, %0 ], [ %d.promoted4, %BB0.loopexit ]
+bb:
+ %sel = select i1 %cmp1, i32 0, i32 1
br label %BB1
-BB1: ; preds = %BB1.backedge, %BB0
- %d.promoted5 = phi i16 [ %d.promoted6, %BB0 ], [ %d.promoted4, %BB1.backedge ]
- %2 = phi i16 [ %d.promoted6, %BB0 ], [ %6, %BB1.backedge ]
- %.1 = phi i32 [ 2, %BB0 ], [ %.3, %BB1.backedge ]
- %3 = load volatile i32, ptr @f, align 4
- %.not = icmp eq i32 %3, 0
- br i1 %.not, label %BB7, label %BB2
+BB1: ; preds = %BB1.backedge, %BB7, %bb
+ %i = phi i16 [ 0, %BB1.backedge ], [ 0, %bb ], [ 1, %BB7 ]
+ br i1 %not, label %BB7, label %BB2
BB2: ; preds = %BB1
- %4 = add i16 %2, 1
- store i16 %4, ptr @d, align 2
- %5 = load volatile i64, ptr @g, align 8
- %.not1 = icmp eq i64 %5, 0
- %spec.select = select i1 %.not1, i32 %., i32 %.1
+ store i16 0, ptr %d, align 2
+ %spec.select = select i1 %cmp2, i32 %sel, i32 0
br label %BB7
BB7: ; preds = %BB2, %BB1
- %d.promoted4 = phi i16 [ %d.promoted5, %BB1 ], [ %4, %BB2 ]
- %6 = phi i16 [ %2, %BB1 ], [ %4, %BB2 ]
- %.3 = phi i32 [ %.1, %BB1 ], [ %spec.select, %BB2 ]
- switch i32 %.3, label %BB9 [
- i32 0, label %BB1.backedge
- i32 7, label %BB1.backedge
- i32 6, label %BB8
- i32 2, label %BB0.loopexit
+ %d.promoted4 = phi i16 [ 0, %BB1 ], [ 1, %BB2 ]
+ %_3 = phi i32 [ 0, %BB1 ], [ %spec.select, %BB2 ]
+ switch i32 %_3, label %BB1.backedge [
+ i32 0, label %BB1
+ i32 1, label %BB8
]
-BB1.backedge: ; preds = %BB7, %BB7
+BB1.backedge: ; preds = %BB7
br label %BB1
BB8: ; preds = %BB7
ret void
-
-BB9: ; preds = %BB7
- unreachable
}
-
-define void @pr106083_select_dead_uses() {
+define void @pr106083_select_dead_uses(i1 %cmp1, i1 %not, ptr %p) {
; CHECK-LABEL: @pr106083_select_dead_uses(
-; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr @a, align 8
-; CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr @i, align 8
-; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr @c, align 8
-; CHECK-NEXT: [[DOTNOT3:%.*]] = icmp eq i64 [[TMP3]], 0
-; CHECK-NEXT: br i1 [[DOTNOT3]], label [[DOTLOOPEXIT6:%.*]], label [[SPEC_SELECT_SI_UNFOLD_FALSE:%.*]]
-; CHECK: .loopexit6.loopexit:
-; CHECK-NEXT: br label [[DOTLOOPEXIT6]]
+; CHECK-NEXT: bb:
+; CHECK-NEXT: br i1 [[CMP1:%.*]], label [[DOTLOOPEXIT6:%.*]], label [[SPEC_SELECT_SI_UNFOLD_FALSE:%.*]]
; CHECK: spec.select.si.unfold.false:
-; CHECK-NEXT: [[DOTSI_UNFOLD_PHI:%.*]] = phi i32 [ 2, [[TMP0:%.*]] ]
+; CHECK-NEXT: [[DOTSI_UNFOLD_PHI1:%.*]] = phi i32 [ 1, [[BB:%.*]] ]
; CHECK-NEXT: br label [[DOTLOOPEXIT6]]
; CHECK: .loopexit6:
-; CHECK-NEXT: [[SPEC_SELECT_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[SPEC_SELECT_SI_UNFOLD_PHI]], [[DOTLOOPEXIT6_LOOPEXIT:%.*]] ], [ 0, [[TMP0]] ], [ [[DOTSI_UNFOLD_PHI]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ]
-; CHECK-NEXT: br label [[TMP6:%.*]]
-; CHECK: 4:
-; CHECK-NEXT: [[DOT1:%.*]] = phi i32 [ [[DOT21:%.*]], [[DOTBACKEDGE:%.*]] ]
-; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP5]], 0
-; CHECK-NEXT: br i1 [[DOTNOT]], label [[SELECT_UNFOLD_JT0:%.*]], label [[TMP8:%.*]]
-; CHECK: 6:
-; CHECK-NEXT: [[DOT1_JT2:%.*]] = phi i32 [ 2, [[DOTLOOPEXIT6]] ]
-; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP1]], align 4
-; CHECK-NEXT: [[DOTNOT_JT2:%.*]] = icmp eq i32 [[TMP7]], 0
-; CHECK-NEXT: br i1 [[DOTNOT_JT2]], label [[SELECT_UNFOLD_JT0]], label [[TMP10:%.*]]
-; CHECK: 8:
-; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP2]], align 4
-; CHECK-NEXT: [[DOTNOT2:%.*]] = icmp eq i32 [[TMP9]], 0
-; CHECK-NEXT: br i1 [[DOTNOT2]], label [[SELECT_UNFOLD:%.*]], label [[SPEC_SELECT7_SI_UNFOLD_FALSE:%.*]]
-; CHECK: 10:
-; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP2]], align 4
-; CHECK-NEXT: [[DOTNOT2_JT2:%.*]] = icmp eq i32 [[TMP11]], 0
-; CHECK-NEXT: br i1 [[DOTNOT2_JT2]], label [[SELECT_UNFOLD]], label [[SPEC_SELECT7_SI_UNFOLD_FALSE_JT2:%.*]]
+; CHECK-NEXT: [[SPEC_SELECT_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[SPEC_SELECT_SI_UNFOLD_PHI]], [[SELECT_UNFOLD:%.*]] ], [ 0, [[BB]] ], [ [[DOTSI_UNFOLD_PHI1]], [[SPEC_SELECT_SI_UNFOLD_FALSE]] ]
+; CHECK-NEXT: br i1 [[NOT:%.*]], label [[SELECT_UNFOLD_JT0:%.*]], label [[BB1:%.*]]
+; CHECK: bb1:
+; CHECK-NEXT: [[I:%.*]] = load i32, ptr [[P:%.*]], align 4
+; CHECK-NEXT: [[NOT2:%.*]] = icmp eq i32 0, 0
+; CHECK-NEXT: br i1 [[NOT2]], label [[SELECT_UNFOLD]], label [[SPEC_SELECT7_SI_UNFOLD_FALSE_JT0:%.*]]
; CHECK: spec.select7.si.unfold.false:
-; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI:%.*]] = phi i32 [ [[DOT1]], [[TMP8]] ]
; CHECK-NEXT: br label [[SELECT_UNFOLD]]
-; CHECK: spec.select7.si.unfold.false.jt2:
-; CHECK-NEXT: [[DOT1_SI_UNFOLD_PHI_JT2:%.*]] = phi i32 [ [[DOT1_JT2]], [[TMP10]] ]
-; CHECK-NEXT: br label [[SELECT_UNFOLD_JT2:%.*]]
+; CHECK: spec.select7.si.unfold.false.jt0:
+; CHECK-NEXT: [[DOTSI_UNFOLD_PHI_JT0:%.*]] = phi i32 [ 0, [[BB1]] ]
+; CHECK-NEXT: br label [[SELECT_UNFOLD_JT0]]
; CHECK: select.unfold:
-; CHECK-NEXT: [[DOT2:%.*]] = phi i32 [ [[SPEC_SELECT_SI_UNFOLD_PHI]], [[TMP8]] ], [ [[DOT1_SI_UNFOLD_PHI]], [[SPEC_SELECT7_SI_UNFOLD_FALSE]] ], [ [[SPEC_SELECT_SI_UNFOLD_PHI]], [[TMP10]] ]
-; CHECK-NEXT: switch i32 [[DOT2]], label [[TMP12:%.*]] [
+; CHECK-NEXT: [[_2:%.*]] = phi i32 [ [[SPEC_SELECT_SI_UNFOLD_PHI]], [[BB1]] ], [ poison, [[SPEC_SELECT7_SI_UNFOLD_FALSE:%.*]] ]
+; CHECK-NEXT: switch i32 [[_2]], label [[BB2:%.*]] [
; CHECK-NEXT: i32 0, label [[DOTPREHEADER_PREHEADER:%.*]]
-; CHECK-NEXT: i32 2, label [[DOTLOOPEXIT6_LOOPEXIT]]
+; CHECK-NEXT: i32 1, label [[DOTLOOPEXIT6]]
; CHECK-NEXT: ]
-; CHECK: select.unfold.jt2:
-; CHECK-NEXT: [[DOT2_JT2:%.*]] = phi i32 [ [[DOT1_SI_UNFOLD_PHI_JT2]], [[SPEC_SELECT7_SI_UNFOLD_FALSE_JT2]] ]
-; CHECK-NEXT: br label [[DOTLOOPEXIT6_LOOPEXIT]]
; CHECK: select.unfold.jt0:
-; CHECK-NEXT: [[DOT2_JT0:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ 0, [[TMP6]] ]
+; CHECK-NEXT: [[_2_JT0:%.*]] = phi i32 [ 0, [[DOTLOOPEXIT6]] ], [ [[DOTSI_UNFOLD_PHI_JT0]], [[SPEC_SELECT7_SI_UNFOLD_FALSE_JT0]] ]
; CHECK-NEXT: br label [[DOTPREHEADER_PREHEADER]]
; CHECK: .preheader.preheader:
-; CHECK-NEXT: [[DOT21]] = phi i32 [ [[DOT2_JT0]], [[SELECT_UNFOLD_JT0]] ], [ [[DOT2]], [[SELECT_UNFOLD]] ]
-; CHECK-NEXT: store i32 0, ptr @b, align 4
-; CHECK-NEXT: br label [[DOTBACKEDGE]]
-; CHECK: .backedge:
-; CHECK-NEXT: br label [[TMP4]]
-; CHECK: 12:
+; CHECK-NEXT: ret void
+; CHECK: bb2:
; CHECK-NEXT: unreachable
;
- %1 = load ptr, ptr @a, align 8
- %2 = load ptr, ptr @i, align 8
- %3 = load i64, ptr @c, align 8
- %.not3 = icmp eq i64 %3, 0
- %spec.select = select i1 %.not3, i32 0, i32 2
- br label %.loopexit6
-
-.loopexit6.loopexit: ; preds = %select.unfold
+bb:
+ %spec.select = select i1 %cmp1, i32 0, i32 1
br label %.loopexit6
-.loopexit6: ; preds = %.loopexit6.loopexit, %0
- br label %4
-
-4: ; preds = %.backedge, %.loopexit6
- %.1 = phi i32 [ 2, %.loopexit6 ], [ %.2, %.backedge ]
- %5 = load i32, ptr %1, align 4
- %.not = icmp eq i32 %5, 0
- br i1 %.not, label %select.unfold, label %6
+.loopexit6: ; preds = %select.unfold, %bb
+ br i1 %not, label %select.unfold, label %bb1
-6: ; preds = %4
- %7 = load i32, ptr %2, align 4
- %.not2 = icmp eq i32 %7, 0
- %spec.select7 = select i1 %.not2, i32 %spec.select, i32 %.1
+bb1: ; preds = %.loopexit6
+ %i = load i32, ptr %p, align 4
+ %not2 = icmp eq i32 0, 0
+ %spec.select7 = select i1 %not2, i32 %spec.select, i32 0
br label %select.unfold
-select.unfold: ; preds = %6, %4
- %.2 = phi i32 [ 0, %4 ], [ %spec.select7, %6 ]
- switch i32 %.2, label %8 [
+select.unfold: ; preds = %bb1, %.loopexit6
+ %_2 = phi i32 [ 0, %.loopexit6 ], [ %spec.select7, %bb1 ]
+ switch i32 %_2, label %bb2 [
i32 0, label %.preheader.preheader
- i32 2, label %.loopexit6.loopexit
+ i32 1, label %.loopexit6
]
.preheader.preheader: ; preds = %select.unfold
- store i32 0, ptr @b, align 4
- br label %.backedge
-
-.backedge: ; preds = %.preheader.preheader
- br label %4
+ ret void
-8: ; preds = %select.unfold
+bb2: ; preds = %select.unfold
unreachable
}
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