[llvm] [RISC-V][GISEL] Select G_BITCAST for scalable vectors (PR #101486)
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 23 14:40:05 PDT 2024
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@@ -0,0 +1,869 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -mattr=+v -run-pass=instruction-select -simplify-mir -verify-machineinstrs %s -o - | FileCheck -check-prefix=RV32I %s
+# RUN: llc -mtriple=riscv64 -mattr=+v -run-pass=instruction-select -simplify-mir -verify-machineinstrs %s -o - | FileCheck -check-prefix=RV64I %s
+--- |
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michaelmaitland wrote:
Are we able to drop the LLVM IR part of this file (i.e. what is between this `---|` and `...`)? You will probably need to rename `bb.1 (%ir-block.0):` to `bb.1:` in the corresponding MIR functions below since we removed the LLVM IR.
https://github.com/llvm/llvm-project/pull/101486
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