[llvm] [RISCV] Handle zvfhmin and zvfbfmin promotion to f32 in half arith costs (PR #108361)

[Craig Topper via llvm-commits]

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@@ -1908,6 +1908,13 @@ InstructionCost RISCVTTIImpl::getArithmeticInstrCost(
     return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Op1Info, Op2Info,
                                          Args, CxtI);
 
+  // f16 with zvfhmin and bf16 will be promoted to f32.
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topperc wrote:

We extend and truncate around every op. We can't fold them away as it would change the rounding.

https://github.com/llvm/llvm-project/pull/108361