[llvm] [Lint][AMDGPU] No store to const addrspace (PR #109181)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 23 09:15:18 PDT 2024
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/109181
>From a0990280f4cfa70cd465b06847cb7e9b8a79fe8d Mon Sep 17 00:00:00 2001
From: jofernau <Joe.Fernau at amd.com>
Date: Wed, 18 Sep 2024 12:34:36 -0700
Subject: [PATCH 1/4] [Verifier][AMDGPU] No store to const addrspace
Ensure store to const addrspace is not allowed by IR Verifier.
---
llvm/lib/IR/Verifier.cpp | 31 +++++++++++++++++++++++++
llvm/test/CodeGen/AMDGPU/const-store.ll | 9 +++++++
2 files changed, 40 insertions(+)
create mode 100644 llvm/test/CodeGen/AMDGPU/const-store.ll
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index 06a67346fbf959..ca213a77baf42e 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -4224,6 +4224,33 @@ void Verifier::visitLoadInst(LoadInst &LI) {
visitInstruction(LI);
}
+static bool isConstantAddressSpace(unsigned AS) {
+ switch (AS) {
+ using namespace AMDGPUAS;
+ case CONSTANT_ADDRESS:
+ case CONSTANT_ADDRESS_32BIT:
+ case CONSTANT_BUFFER_0:
+ case CONSTANT_BUFFER_1:
+ case CONSTANT_BUFFER_2:
+ case CONSTANT_BUFFER_3:
+ case CONSTANT_BUFFER_4:
+ case CONSTANT_BUFFER_5:
+ case CONSTANT_BUFFER_6:
+ case CONSTANT_BUFFER_7:
+ case CONSTANT_BUFFER_8:
+ case CONSTANT_BUFFER_9:
+ case CONSTANT_BUFFER_10:
+ case CONSTANT_BUFFER_11:
+ case CONSTANT_BUFFER_12:
+ case CONSTANT_BUFFER_13:
+ case CONSTANT_BUFFER_14:
+ case CONSTANT_BUFFER_15:
+ return true;
+ default:
+ return false;
+ }
+}
+
void Verifier::visitStoreInst(StoreInst &SI) {
PointerType *PTy = dyn_cast<PointerType>(SI.getOperand(1)->getType());
Check(PTy, "Store operand must be a pointer.", &SI);
@@ -4246,6 +4273,10 @@ void Verifier::visitStoreInst(StoreInst &SI) {
Check(SI.getSyncScopeID() == SyncScope::System,
"Non-atomic store cannot have SynchronizationScope specified", &SI);
}
+ if (TT.isAMDGPU()) {
+ Check(!isConstantAddressSpace(SI.getPointerAddressSpace()),
+ "Store cannot be to constant addrspace", &SI);
+ }
visitInstruction(SI);
}
diff --git a/llvm/test/CodeGen/AMDGPU/const-store.ll b/llvm/test/CodeGen/AMDGPU/const-store.ll
new file mode 100644
index 00000000000000..9447ef9db59986
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/const-store.ll
@@ -0,0 +1,9 @@
+; RUN: not llc -mtriple=amdgcn < %s |& FileCheck %s
+
+define amdgpu_kernel void @store_const(ptr addrspace(4) %out, i32 %a, i32 %b) {
+; CHECK: Store cannot be to constant addrspace
+; CHECK-NEXT: store i32 %r, ptr addrspace(4) %out
+ %r = add i32 %a, %b
+ store i32 %r, ptr addrspace(4) %out
+ ret void
+}
>From 4553484a018d2b1ea9c216152e7fb844a3a57b44 Mon Sep 17 00:00:00 2001
From: jofernau <Joe.Fernau at amd.com>
Date: Fri, 20 Sep 2024 11:16:37 -0700
Subject: [PATCH 2/4] [Lint] Switch check to Linter
---
llvm/lib/Analysis/Lint.cpp | 39 ++++++++++++++++++++++++-
llvm/lib/IR/Verifier.cpp | 31 --------------------
llvm/test/Analysis/Lint/const-store.ll | 10 +++++++
llvm/test/CodeGen/AMDGPU/const-store.ll | 9 ------
4 files changed, 48 insertions(+), 41 deletions(-)
create mode 100644 llvm/test/Analysis/Lint/const-store.ll
delete mode 100644 llvm/test/CodeGen/AMDGPU/const-store.ll
diff --git a/llvm/lib/Analysis/Lint.cpp b/llvm/lib/Analysis/Lint.cpp
index e0a029802bbd9a..213c0e5c3d910f 100644
--- a/llvm/lib/Analysis/Lint.cpp
+++ b/llvm/lib/Analysis/Lint.cpp
@@ -67,6 +67,7 @@
#include "llvm/IR/PassManager.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/Value.h"
+#include "llvm/Support/AMDGPUAddrSpace.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/KnownBits.h"
#include "llvm/Support/raw_ostream.h"
@@ -122,8 +123,10 @@ class Lint : public InstVisitor<Lint> {
Value *findValueImpl(Value *V, bool OffsetOk,
SmallPtrSetImpl<Value *> &Visited) const;
+ bool isConstantAddressSpace(unsigned AS) const;
public:
Module *Mod;
+ Triple TT;
const DataLayout *DL;
AliasAnalysis *AA;
AssumptionCache *AC;
@@ -135,7 +138,8 @@ class Lint : public InstVisitor<Lint> {
Lint(Module *Mod, const DataLayout *DL, AliasAnalysis *AA,
AssumptionCache *AC, DominatorTree *DT, TargetLibraryInfo *TLI)
- : Mod(Mod), DL(DL), AA(AA), AC(AC), DT(DT), TLI(TLI),
+ : Mod(Mod), TT(Triple::normalize(Mod->getTargetTriple())),
+ DL(DL), AA(AA), AC(AC), DT(DT), TLI(TLI),
MessagesStr(Messages) {}
void WriteValues(ArrayRef<const Value *> Vs) {
@@ -378,6 +382,36 @@ void Lint::visitReturnInst(ReturnInst &I) {
}
}
+bool Lint::isConstantAddressSpace(unsigned AS) const {
+ if (TT.isAMDGPU()) {
+ switch(AS) {
+ using namespace AMDGPUAS;
+ case CONSTANT_ADDRESS:
+ case CONSTANT_ADDRESS_32BIT:
+ case CONSTANT_BUFFER_0:
+ case CONSTANT_BUFFER_1:
+ case CONSTANT_BUFFER_2:
+ case CONSTANT_BUFFER_3:
+ case CONSTANT_BUFFER_4:
+ case CONSTANT_BUFFER_5:
+ case CONSTANT_BUFFER_6:
+ case CONSTANT_BUFFER_7:
+ case CONSTANT_BUFFER_8:
+ case CONSTANT_BUFFER_9:
+ case CONSTANT_BUFFER_10:
+ case CONSTANT_BUFFER_11:
+ case CONSTANT_BUFFER_12:
+ case CONSTANT_BUFFER_13:
+ case CONSTANT_BUFFER_14:
+ case CONSTANT_BUFFER_15:
+ return true;
+ default:
+ return false;
+ }
+ }
+ return false;
+}
+
// TODO: Check that the reference is in bounds.
// TODO: Check readnone/readonly function attributes.
void Lint::visitMemoryReference(Instruction &I, const MemoryLocation &Loc,
@@ -401,6 +435,9 @@ void Lint::visitMemoryReference(Instruction &I, const MemoryLocation &Loc,
"Unusual: Address one pointer dereference", &I);
if (Flags & MemRef::Write) {
+ Check(!isConstantAddressSpace(UnderlyingObject->getType()->getPointerAddressSpace()),
+ "Undefined behavior: Write to const memory", &I);
+
if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(UnderlyingObject))
Check(!GV->isConstant(), "Undefined behavior: Write to read-only memory",
&I);
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index ca213a77baf42e..06a67346fbf959 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -4224,33 +4224,6 @@ void Verifier::visitLoadInst(LoadInst &LI) {
visitInstruction(LI);
}
-static bool isConstantAddressSpace(unsigned AS) {
- switch (AS) {
- using namespace AMDGPUAS;
- case CONSTANT_ADDRESS:
- case CONSTANT_ADDRESS_32BIT:
- case CONSTANT_BUFFER_0:
- case CONSTANT_BUFFER_1:
- case CONSTANT_BUFFER_2:
- case CONSTANT_BUFFER_3:
- case CONSTANT_BUFFER_4:
- case CONSTANT_BUFFER_5:
- case CONSTANT_BUFFER_6:
- case CONSTANT_BUFFER_7:
- case CONSTANT_BUFFER_8:
- case CONSTANT_BUFFER_9:
- case CONSTANT_BUFFER_10:
- case CONSTANT_BUFFER_11:
- case CONSTANT_BUFFER_12:
- case CONSTANT_BUFFER_13:
- case CONSTANT_BUFFER_14:
- case CONSTANT_BUFFER_15:
- return true;
- default:
- return false;
- }
-}
-
void Verifier::visitStoreInst(StoreInst &SI) {
PointerType *PTy = dyn_cast<PointerType>(SI.getOperand(1)->getType());
Check(PTy, "Store operand must be a pointer.", &SI);
@@ -4273,10 +4246,6 @@ void Verifier::visitStoreInst(StoreInst &SI) {
Check(SI.getSyncScopeID() == SyncScope::System,
"Non-atomic store cannot have SynchronizationScope specified", &SI);
}
- if (TT.isAMDGPU()) {
- Check(!isConstantAddressSpace(SI.getPointerAddressSpace()),
- "Store cannot be to constant addrspace", &SI);
- }
visitInstruction(SI);
}
diff --git a/llvm/test/Analysis/Lint/const-store.ll b/llvm/test/Analysis/Lint/const-store.ll
new file mode 100644
index 00000000000000..013fe909ab465e
--- /dev/null
+++ b/llvm/test/Analysis/Lint/const-store.ll
@@ -0,0 +1,10 @@
+; RUN: not opt --mtriple=amdgcn --passes=lint --lint-abort-on-error %s -o - |& FileCheck %s
+; RUN: not opt --mtriple=amdgcn --mcpu=gfx1030 --passes=lint --lint-abort-on-error %s -o - |& FileCheck %s
+
+define amdgpu_kernel void @store_const(ptr addrspace(4) %out, i32 %a, i32 %b) {
+; CHECK: Undefined behavior: Write to const memory
+; CHECK-NEXT: store i32 %r, ptr addrspace(4) %out
+ %r = add i32 %a, %b
+ store i32 %r, ptr addrspace(4) %out
+ ret void
+}
diff --git a/llvm/test/CodeGen/AMDGPU/const-store.ll b/llvm/test/CodeGen/AMDGPU/const-store.ll
deleted file mode 100644
index 9447ef9db59986..00000000000000
--- a/llvm/test/CodeGen/AMDGPU/const-store.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: not llc -mtriple=amdgcn < %s |& FileCheck %s
-
-define amdgpu_kernel void @store_const(ptr addrspace(4) %out, i32 %a, i32 %b) {
-; CHECK: Store cannot be to constant addrspace
-; CHECK-NEXT: store i32 %r, ptr addrspace(4) %out
- %r = add i32 %a, %b
- store i32 %r, ptr addrspace(4) %out
- ret void
-}
>From 393311ca3330fd9ed7baa598e032fc8ee1ebaa66 Mon Sep 17 00:00:00 2001
From: jofernau <Joe.Fernau at amd.com>
Date: Fri, 20 Sep 2024 13:31:10 -0700
Subject: [PATCH 3/4] Add negative test, move isConstantAddressSpace
---
llvm/include/llvm/Support/AMDGPUAddrSpace.h | 27 +++++++++++++++
llvm/lib/Analysis/Lint.cpp | 37 ++-------------------
llvm/test/Analysis/Lint/const-store.ll | 15 +++++++--
3 files changed, 43 insertions(+), 36 deletions(-)
diff --git a/llvm/include/llvm/Support/AMDGPUAddrSpace.h b/llvm/include/llvm/Support/AMDGPUAddrSpace.h
index 4a278d0acc23b8..6f03c3fca38069 100644
--- a/llvm/include/llvm/Support/AMDGPUAddrSpace.h
+++ b/llvm/include/llvm/Support/AMDGPUAddrSpace.h
@@ -93,6 +93,33 @@ inline bool isExtendedGlobalAddrSpace(unsigned AS) {
AS == AMDGPUAS::CONSTANT_ADDRESS_32BIT ||
AS > AMDGPUAS::MAX_AMDGPU_ADDRESS;
}
+
+inline bool isConstantAddressSpace(unsigned AS) {
+ switch(AS) {
+ using namespace AMDGPUAS;
+ case CONSTANT_ADDRESS:
+ case CONSTANT_ADDRESS_32BIT:
+ case CONSTANT_BUFFER_0:
+ case CONSTANT_BUFFER_1:
+ case CONSTANT_BUFFER_2:
+ case CONSTANT_BUFFER_3:
+ case CONSTANT_BUFFER_4:
+ case CONSTANT_BUFFER_5:
+ case CONSTANT_BUFFER_6:
+ case CONSTANT_BUFFER_7:
+ case CONSTANT_BUFFER_8:
+ case CONSTANT_BUFFER_9:
+ case CONSTANT_BUFFER_10:
+ case CONSTANT_BUFFER_11:
+ case CONSTANT_BUFFER_12:
+ case CONSTANT_BUFFER_13:
+ case CONSTANT_BUFFER_14:
+ case CONSTANT_BUFFER_15:
+ return true;
+ default:
+ return false;
+ }
+}
} // end namespace AMDGPU
} // end namespace llvm
diff --git a/llvm/lib/Analysis/Lint.cpp b/llvm/lib/Analysis/Lint.cpp
index 213c0e5c3d910f..3503b6980ce3c6 100644
--- a/llvm/lib/Analysis/Lint.cpp
+++ b/llvm/lib/Analysis/Lint.cpp
@@ -122,8 +122,6 @@ class Lint : public InstVisitor<Lint> {
Value *findValue(Value *V, bool OffsetOk) const;
Value *findValueImpl(Value *V, bool OffsetOk,
SmallPtrSetImpl<Value *> &Visited) const;
-
- bool isConstantAddressSpace(unsigned AS) const;
public:
Module *Mod;
Triple TT;
@@ -382,36 +380,6 @@ void Lint::visitReturnInst(ReturnInst &I) {
}
}
-bool Lint::isConstantAddressSpace(unsigned AS) const {
- if (TT.isAMDGPU()) {
- switch(AS) {
- using namespace AMDGPUAS;
- case CONSTANT_ADDRESS:
- case CONSTANT_ADDRESS_32BIT:
- case CONSTANT_BUFFER_0:
- case CONSTANT_BUFFER_1:
- case CONSTANT_BUFFER_2:
- case CONSTANT_BUFFER_3:
- case CONSTANT_BUFFER_4:
- case CONSTANT_BUFFER_5:
- case CONSTANT_BUFFER_6:
- case CONSTANT_BUFFER_7:
- case CONSTANT_BUFFER_8:
- case CONSTANT_BUFFER_9:
- case CONSTANT_BUFFER_10:
- case CONSTANT_BUFFER_11:
- case CONSTANT_BUFFER_12:
- case CONSTANT_BUFFER_13:
- case CONSTANT_BUFFER_14:
- case CONSTANT_BUFFER_15:
- return true;
- default:
- return false;
- }
- }
- return false;
-}
-
// TODO: Check that the reference is in bounds.
// TODO: Check readnone/readonly function attributes.
void Lint::visitMemoryReference(Instruction &I, const MemoryLocation &Loc,
@@ -435,8 +403,9 @@ void Lint::visitMemoryReference(Instruction &I, const MemoryLocation &Loc,
"Unusual: Address one pointer dereference", &I);
if (Flags & MemRef::Write) {
- Check(!isConstantAddressSpace(UnderlyingObject->getType()->getPointerAddressSpace()),
- "Undefined behavior: Write to const memory", &I);
+ if (TT.isAMDGPU())
+ Check(!AMDGPU::isConstantAddressSpace(UnderlyingObject->getType()->getPointerAddressSpace()),
+ "Undefined behavior: Write to const memory", &I);
if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(UnderlyingObject))
Check(!GV->isConstant(), "Undefined behavior: Write to read-only memory",
diff --git a/llvm/test/Analysis/Lint/const-store.ll b/llvm/test/Analysis/Lint/const-store.ll
index 013fe909ab465e..89600c4aa575f5 100644
--- a/llvm/test/Analysis/Lint/const-store.ll
+++ b/llvm/test/Analysis/Lint/const-store.ll
@@ -1,5 +1,7 @@
-; RUN: not opt --mtriple=amdgcn --passes=lint --lint-abort-on-error %s -o - |& FileCheck %s
-; RUN: not opt --mtriple=amdgcn --mcpu=gfx1030 --passes=lint --lint-abort-on-error %s -o - |& FileCheck %s
+; RUN: not opt --mtriple=amdgcn --passes=lint --lint-abort-on-error %s -o /dev/null |& FileCheck %s
+; RUN: opt --mtriple=amdgcn --mcpu=gfx1030 --passes=lint %s -o /dev/null |& FileCheck %s --check-prefixes=CHECK,CHECK0
+; RUN: opt --mtriple=x86_64 --passes=lint --lint-abort-on-error %s -o /dev/null |& FileCheck %s --allow-empty --check-prefix=NOERR
+; NOERR: {{^$}}
define amdgpu_kernel void @store_const(ptr addrspace(4) %out, i32 %a, i32 %b) {
; CHECK: Undefined behavior: Write to const memory
@@ -8,3 +10,12 @@ define amdgpu_kernel void @store_const(ptr addrspace(4) %out, i32 %a, i32 %b) {
store i32 %r, ptr addrspace(4) %out
ret void
}
+
+define amdgpu_kernel void @memcpy_to_const(ptr addrspace(6) %dst, ptr %src) {
+; CHECK0: Undefined behavior: Write to const memory
+; CHECK0-NEXT: call void @llvm.memcpy.p6.p0.i32(ptr addrspace(6) %dst, ptr %src, i32 256, i1 false)
+ call void @llvm.memcpy.px.py.i32(ptr addrspace(6) %dst, ptr %src, i32 256, i1 false)
+ ret void
+}
+
+declare void @llvm.memcpy.px.py.i32(ptr addrspace(6) noalias nocapture writeonly, ptr noalias nocapture readonly, i32, i1 immarg)
>From ed164f3ec9d290e0f134c96baa1b291bb2247b7e Mon Sep 17 00:00:00 2001
From: jofernau <Joe.Fernau at amd.com>
Date: Mon, 23 Sep 2024 08:54:04 -0700
Subject: [PATCH 4/4] Added cmpxchg, atomicrmw to Lint
---
llvm/lib/Analysis/Lint.cpp | 14 +++++++++++++-
llvm/test/Analysis/Lint/const-store.ll | 21 ++++++++++++++++++---
2 files changed, 31 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Analysis/Lint.cpp b/llvm/lib/Analysis/Lint.cpp
index 3503b6980ce3c6..dda2a5d93f6e2b 100644
--- a/llvm/lib/Analysis/Lint.cpp
+++ b/llvm/lib/Analysis/Lint.cpp
@@ -103,6 +103,8 @@ class Lint : public InstVisitor<Lint> {
void visitReturnInst(ReturnInst &I);
void visitLoadInst(LoadInst &I);
void visitStoreInst(StoreInst &I);
+ void visitAtomicCmpXchgInst(AtomicCmpXchgInst &I);
+ void visitAtomicRMWInst(AtomicRMWInst &I);
void visitXor(BinaryOperator &I);
void visitSub(BinaryOperator &I);
void visitLShr(BinaryOperator &I);
@@ -405,7 +407,7 @@ void Lint::visitMemoryReference(Instruction &I, const MemoryLocation &Loc,
if (Flags & MemRef::Write) {
if (TT.isAMDGPU())
Check(!AMDGPU::isConstantAddressSpace(UnderlyingObject->getType()->getPointerAddressSpace()),
- "Undefined behavior: Write to const memory", &I);
+ "Undefined behavior: Write to memory in const addrspace", &I);
if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(UnderlyingObject))
Check(!GV->isConstant(), "Undefined behavior: Write to read-only memory",
@@ -486,6 +488,16 @@ void Lint::visitStoreInst(StoreInst &I) {
I.getOperand(0)->getType(), MemRef::Write);
}
+void Lint::visitAtomicCmpXchgInst(AtomicCmpXchgInst &I) {
+ visitMemoryReference(I, MemoryLocation::get(&I), I.getAlign(),
+ I.getOperand(0)->getType(), MemRef::Write);
+}
+
+void Lint::visitAtomicRMWInst(AtomicRMWInst &I) {
+ visitMemoryReference(I, MemoryLocation::get(&I), I.getAlign(),
+ I.getOperand(0)->getType(), MemRef::Write);
+}
+
void Lint::visitXor(BinaryOperator &I) {
Check(!isa<UndefValue>(I.getOperand(0)) || !isa<UndefValue>(I.getOperand(1)),
"Undefined result: xor(undef, undef)", &I);
diff --git a/llvm/test/Analysis/Lint/const-store.ll b/llvm/test/Analysis/Lint/const-store.ll
index 89600c4aa575f5..f5f2716d09af3a 100644
--- a/llvm/test/Analysis/Lint/const-store.ll
+++ b/llvm/test/Analysis/Lint/const-store.ll
@@ -1,21 +1,36 @@
; RUN: not opt --mtriple=amdgcn --passes=lint --lint-abort-on-error %s -o /dev/null |& FileCheck %s
; RUN: opt --mtriple=amdgcn --mcpu=gfx1030 --passes=lint %s -o /dev/null |& FileCheck %s --check-prefixes=CHECK,CHECK0
; RUN: opt --mtriple=x86_64 --passes=lint --lint-abort-on-error %s -o /dev/null |& FileCheck %s --allow-empty --check-prefix=NOERR
+; REQUIRES: x86-registered-target
+; REQUIRES: amdgpu-registered-target
; NOERR: {{^$}}
define amdgpu_kernel void @store_const(ptr addrspace(4) %out, i32 %a, i32 %b) {
-; CHECK: Undefined behavior: Write to const memory
+; CHECK: Undefined behavior: Write to memory in const addrspace
; CHECK-NEXT: store i32 %r, ptr addrspace(4) %out
%r = add i32 %a, %b
store i32 %r, ptr addrspace(4) %out
ret void
}
+declare void @llvm.memcpy.px.py.i32(ptr addrspace(6) noalias nocapture writeonly, ptr noalias nocapture readonly, i32, i1)
define amdgpu_kernel void @memcpy_to_const(ptr addrspace(6) %dst, ptr %src) {
-; CHECK0: Undefined behavior: Write to const memory
+; CHECK0: Undefined behavior: Write to memory in const addrspace
; CHECK0-NEXT: call void @llvm.memcpy.p6.p0.i32(ptr addrspace(6) %dst, ptr %src, i32 256, i1 false)
call void @llvm.memcpy.px.py.i32(ptr addrspace(6) %dst, ptr %src, i32 256, i1 false)
ret void
}
-declare void @llvm.memcpy.px.py.i32(ptr addrspace(6) noalias nocapture writeonly, ptr noalias nocapture readonly, i32, i1 immarg)
+define amdgpu_kernel void @cmpxchg_to_const(ptr addrspace(4) %dst, i32 %src) {
+; CHECK0: Undefined behavior: Write to memory in const addrspace
+; CHECK0-NEXT: %void = cmpxchg ptr addrspace(4) %dst, i32 0, i32 %src seq_cst monotonic
+ %void = cmpxchg ptr addrspace(4) %dst, i32 0, i32 %src seq_cst monotonic
+ ret void
+}
+
+define amdgpu_kernel void @atomicrmw_to_const(ptr addrspace(4) %dst, i32 %src) {
+; CHECK0: Undefined behavior: Write to memory in const addrspace
+; CHECK0-NEXT: %void = atomicrmw add ptr addrspace(4) %dst, i32 %src acquire
+ %void = atomicrmw add ptr addrspace(4) %dst, i32 %src acquire
+ ret void
+}
More information about the llvm-commits
mailing list