[llvm] [MIR] Allow overriding isSSA, noPhis, noVRegs in MIR input (PR #108546)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,38 @@
+# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+
+# Test that computed properties are not conflicting with explicitly set
+# properties
+
+---
+# CHECK-LABEL: TestNoPhisOverrideConflict
+# CHECK-SAME: has explicit property NoPhi, but contains at least one PHI
+name:            TestNoPhisOverrideConflict
+noPhis: true
+tracksRegLiveness: true
+body: |
+  bb.0:
+    %0:_(s32) = IMPLICIT_DEF
+
+  bb.1:
+    %1:_(s32) = PHI %0, %bb.0, %1, %bb.1
+    G_BR %bb.1
+...
+---
+# CHECK-LABEL: TestIsSSAOverrideConflict
+# CHECK-SAME: has explicit property IsSSA, but is not valid SSA
+name:            TestIsSSAOverrideConflict
+isSSA: true
+body: |
+  bb.0:
+    %0:_(s32) = IMPLICIT_DEF
+    %0:_(s32) = IMPLICIT_DEF
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arsenm wrote:

These should also fail the verifier because it is using a non-generic instruction with generic virtual registers. Either use G_IMPLICIT_DEF, or switch this to a real register class without a type 

https://github.com/llvm/llvm-project/pull/108546