[llvm] [MIR] Allow overriding isSSA, noPhis, noVRegs in MIR input (PR #108546)

Dominik Montada via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 23 03:29:44 PDT 2024


================
@@ -398,20 +400,25 @@ void MIRParserImpl::computeFunctionProperties(MachineFunction &MF) {
       }
     }
   }
-  if (!HasPHI)
+
+  // Don't overwrite NoPHIs if the input MIR explicitly set it to false
+  if (YamlMF.NoPHIs && !HasPHI)
     Properties.set(MachineFunctionProperties::Property::NoPHIs);
+
   MF.setHasInlineAsm(HasInlineAsm);
 
   if (HasTiedOps && AllTiedOpsRewritten)
     Properties.set(MachineFunctionProperties::Property::TiedOpsRewritten);
 
-  if (isSSA(MF))
+  // Don't overwrite IsSSA if the input MIR explicitly set it to false
+  if (YamlMF.IsSSA && isSSA(MF))
----------------
gargaroff wrote:

Changed it to produce an error if the explicit property conflicts with the input MIR

https://github.com/llvm/llvm-project/pull/108546


More information about the llvm-commits mailing list