[llvm] [AMDGPU] When allocating VGPRs, VGPR spills are not part of the prologue (PR #109439)

[Christudasan Devadasan via llvm-commits]

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@@ -8884,8 +8884,9 @@ bool SIInstrInfo::isBasicBlockPrologue(const MachineInstr &MI,
   // FIXME: Copies inserted in the block prolog for live-range split should also
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cdevadas wrote:

This FIXME isn't relevant anymore. We are including only the SGPR spills to the prolog.

https://github.com/llvm/llvm-project/pull/109439