[llvm] [MIPS] Fix failing to legalize load+call with vector of non-p2 intege… (PR #109625)

[via llvm-commits]

https://github.com/yingopq created https://github.com/llvm/llvm-project/pull/109625

…r type

Add a condition to check whether the vector element type is a power of 2.

Fix #102870.

>From 85cb6203ffd60f32cf87d5221fa9788dbae473d0 Mon Sep 17 00:00:00 2001
From: Ying Huang <ying.huang at oss.cipunited.com>
Date: Mon, 23 Sep 2024 03:34:24 -0400
Subject: [PATCH] [MIPS] Fix failing to legalize load+call with vector of
 non-p2 integer type

Add a condition to check whether the vector element type is a power of 2.

Fix #102870.
---
 llvm/lib/Target/Mips/MipsISelLowering.cpp     |  3 +-
 .../Mips/cconv/not-power-of-2-vector.ll       | 30 +++++++++++++++++++
 2 files changed, 32 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/Mips/cconv/not-power-of-2-vector.ll

diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 59f78a8ca306c5..74306ae713e4de 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -124,7 +124,8 @@ unsigned MipsTargetLowering::getNumRegistersForCallingConv(LLVMContext &Context,
 unsigned MipsTargetLowering::getVectorTypeBreakdownForCallingConv(
     LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT,
     unsigned &NumIntermediates, MVT &RegisterVT) const {
-  if (VT.isPow2VectorType()) {
+
+  if (VT.isPow2VectorType() && VT.getVectorElementType().isRound()) {
     IntermediateVT = getRegisterTypeForCallingConv(Context, CC, VT);
     RegisterVT = IntermediateVT.getSimpleVT();
     NumIntermediates = getNumRegistersForCallingConv(Context, CC, VT);
diff --git a/llvm/test/CodeGen/Mips/cconv/not-power-of-2-vector.ll b/llvm/test/CodeGen/Mips/cconv/not-power-of-2-vector.ll
new file mode 100644
index 00000000000000..fe35b8011430d3
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/cconv/not-power-of-2-vector.ll
@@ -0,0 +1,30 @@
+; RUN: llc -mtriple=mips-linux-gnu -mcpu=mips32 < %s | FileCheck %s --check-prefix=MIPS32
+
+define void @call_v1i80() {
+; MIPS32-LABEL: call_v1i80:
+; MIPS32:       # %bb.0: # %Entry
+; MIPS32-NEXT:    addiu $sp, $sp, -8
+; MIPS32-NEXT:    .cfi_def_cfa_offset 8
+; MIPS32-NEXT:    sw $ra, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT:    .cfi_offset 31, -4
+; MIPS32-NEXT:    addiu	$1, $zero, 4
+; MIPS32-NEXT:    lw $1, 0($1)
+; MIPS32-NEXT:    srl $2, $1, 16
+; MIPS32-NEXT:    lw $3, 0($zero)
+; MIPS32-NEXT:    sll $4, $3, 16
+; MIPS32-NEXT:    or $5, $4, $2
+; MIPS32-NEXT:    addiu	$2, $zero, 8
+; MIPS32-NEXT:    lhu $2, 0($2)
+; MIPS32-NEXT:    sll $1, $1, 16
+; MIPS32-NEXT:    or $6, $2, $1
+; MIPS32-NEXT:    addiu	$25, $zero, 0
+; MIPS32-NEXT:    jalr $25
+; MIPS32-NEXT:    srl $4, $3, 16
+; MIPS32-NEXT:    lw $ra, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    addiu $sp, $sp, 8
+Entry:
+  %0 = load <1 x i80>, ptr null, align 16
+  call fastcc void null(<1 x i80> %0)
+  ret void
+}