[lld] 6f48201 - [ELF] Replace config-> with ctx.arg.
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 21 22:46:17 PDT 2024
Author: Fangrui Song
Date: 2024-09-21T22:46:13-07:00
New Revision: 6f482010aeb921437193ef5c8884f743ec7cb360
URL: https://github.com/llvm/llvm-project/commit/6f482010aeb921437193ef5c8884f743ec7cb360
DIFF: https://github.com/llvm/llvm-project/commit/6f482010aeb921437193ef5c8884f743ec7cb360.diff
LOG: [ELF] Replace config-> with ctx.arg.
Added:
Modified:
lld/ELF/CallGraphSort.cpp
lld/ELF/Config.h
lld/ELF/MapFile.cpp
lld/ELF/MarkLive.cpp
lld/ELF/OutputSections.cpp
lld/ELF/Target.cpp
Removed:
################################################################################
diff --git a/lld/ELF/CallGraphSort.cpp b/lld/ELF/CallGraphSort.cpp
index a0cf491bbae35b..690dc1e80c9a77 100644
--- a/lld/ELF/CallGraphSort.cpp
+++ b/lld/ELF/CallGraphSort.cpp
@@ -112,7 +112,7 @@ using SectionPair =
// Symbols, and generate a graph between InputSections with the provided
// weights.
CallGraphSort::CallGraphSort() {
- MapVector<SectionPair, uint64_t> &profile = config->callGraphProfile;
+ MapVector<SectionPair, uint64_t> &profile = ctx.arg.callGraphProfile;
DenseMap<const InputSectionBase *, int> secToCluster;
auto getOrCreateNode = [&](const InputSectionBase *isec) -> int {
@@ -243,11 +243,11 @@ DenseMap<const InputSectionBase *, int> CallGraphSort::run() {
break;
}
}
- if (!config->printSymbolOrder.empty()) {
+ if (!ctx.arg.printSymbolOrder.empty()) {
std::error_code ec;
- raw_fd_ostream os(config->printSymbolOrder, ec, sys::fs::OF_None);
+ raw_fd_ostream os(ctx.arg.printSymbolOrder, ec, sys::fs::OF_None);
if (ec) {
- error("cannot open " + config->printSymbolOrder + ": " + ec.message());
+ error("cannot open " + ctx.arg.printSymbolOrder + ": " + ec.message());
return orderMap;
}
@@ -294,7 +294,7 @@ DenseMap<const InputSectionBase *, int> elf::computeCacheDirectedSortOrder() {
};
// Create the graph.
- for (std::pair<SectionPair, uint64_t> &c : config->callGraphProfile) {
+ for (std::pair<SectionPair, uint64_t> &c : ctx.arg.callGraphProfile) {
const InputSectionBase *fromSB = cast<InputSectionBase>(c.first.first);
const InputSectionBase *toSB = cast<InputSectionBase>(c.first.second);
// Ignore edges between input sections belonging to
diff erent sections.
@@ -337,7 +337,7 @@ DenseMap<const InputSectionBase *, int> elf::computeCacheDirectedSortOrder() {
// This first builds a call graph based on the profile data then merges sections
// according either to the C³ or Cache-Directed-Sort ordering algorithm.
DenseMap<const InputSectionBase *, int> elf::computeCallGraphProfileOrder() {
- if (config->callGraphProfileSort == CGProfileSortKind::Cdsort)
+ if (ctx.arg.callGraphProfileSort == CGProfileSortKind::Cdsort)
return computeCacheDirectedSortOrder();
return CallGraphSort().run();
}
diff --git a/lld/ELF/Config.h b/lld/ELF/Config.h
index 7cae8677ef5ce1..eb5367f4bfda47 100644
--- a/lld/ELF/Config.h
+++ b/lld/ELF/Config.h
@@ -670,7 +670,7 @@ LLVM_LIBRARY_VISIBILITY extern Ctx ctx;
// The first two elements of versionDefinitions represent VER_NDX_LOCAL and
// VER_NDX_GLOBAL. This helper returns other elements.
static inline ArrayRef<VersionDefinition> namedVersionDefs() {
- return llvm::ArrayRef(config->versionDefinitions).slice(2);
+ return llvm::ArrayRef(ctx.arg.versionDefinitions).slice(2);
}
void errorOrWarn(const Twine &msg);
diff --git a/lld/ELF/MapFile.cpp b/lld/ELF/MapFile.cpp
index 26de8e4f0d8358..17c694d410a6d3 100644
--- a/lld/ELF/MapFile.cpp
+++ b/lld/ELF/MapFile.cpp
@@ -46,7 +46,7 @@ static constexpr char indent16[] = " "; // 16 spaces
// Print out the first three columns of a line.
static void writeHeader(raw_ostream &os, uint64_t vma, uint64_t lma,
uint64_t size, uint64_t align) {
- if (config->is64)
+ if (ctx.arg.is64)
os << format("%16llx %16llx %8llx %5lld ", vma, lma, size, align);
else
os << format("%8llx %8llx %8llx %5lld ", vma, lma, size, align);
@@ -153,7 +153,7 @@ static void writeMapFile(raw_fd_ostream &os) {
DenseMap<Symbol *, std::string> symStr = getSymbolStrings(syms);
// Print out the header line.
- int w = config->is64 ? 16 : 8;
+ int w = ctx.arg.is64 ? 16 : 8;
os << right_justify("VMA", w) << ' ' << right_justify("LMA", w)
<< " Size Align Out In Symbol\n";
@@ -257,22 +257,22 @@ static void writeCref(raw_fd_ostream &os) {
}
void elf::writeMapAndCref() {
- if (config->mapFile.empty() && !config->cref)
+ if (ctx.arg.mapFile.empty() && !ctx.arg.cref)
return;
llvm::TimeTraceScope timeScope("Write map file");
// Open a map file for writing.
std::error_code ec;
- StringRef mapFile = config->mapFile.empty() ? "-" : config->mapFile;
+ StringRef mapFile = ctx.arg.mapFile.empty() ? "-" : ctx.arg.mapFile;
raw_fd_ostream os = ctx.openAuxiliaryFile(mapFile, ec);
if (ec) {
error("cannot open " + mapFile + ": " + ec.message());
return;
}
- if (!config->mapFile.empty())
+ if (!ctx.arg.mapFile.empty())
writeMapFile(os);
- if (config->cref)
+ if (ctx.arg.cref)
writeCref(os);
}
diff --git a/lld/ELF/MarkLive.cpp b/lld/ELF/MarkLive.cpp
index f11d7f5a1053af..60e62c0cab767e 100644
--- a/lld/ELF/MarkLive.cpp
+++ b/lld/ELF/MarkLive.cpp
@@ -76,7 +76,7 @@ template <class ELFT>
static uint64_t getAddend(InputSectionBase &sec,
const typename ELFT::Rel &rel) {
return ctx.target->getImplicitAddend(sec.content().begin() + rel.r_offset,
- rel.getType(config->isMips64EL));
+ rel.getType(ctx.arg.isMips64EL));
}
template <class ELFT>
@@ -229,10 +229,10 @@ template <class ELFT> void MarkLive<ELFT>::run() {
return;
}
- markSymbol(symtab.find(config->entry));
- markSymbol(symtab.find(config->init));
- markSymbol(symtab.find(config->fini));
- for (StringRef s : config->undefined)
+ markSymbol(symtab.find(ctx.arg.entry));
+ markSymbol(symtab.find(ctx.arg.init));
+ markSymbol(symtab.find(ctx.arg.fini));
+ for (StringRef s : ctx.arg.undefined)
markSymbol(symtab.find(s));
for (StringRef s : ctx.script->referencedSymbols)
markSymbol(symtab.find(s));
@@ -295,7 +295,7 @@ template <class ELFT> void MarkLive<ELFT>::run() {
// script KEEP command.
if (isReserved(sec) || ctx.script->shouldKeep(sec)) {
enqueue(sec, 0);
- } else if ((!config->zStartStopGC || sec->name.starts_with("__libc_")) &&
+ } else if ((!ctx.arg.zStartStopGC || sec->name.starts_with("__libc_")) &&
isValidCIdentifier(sec->name)) {
// As a workaround for glibc libc.a before 2.34
// (https://sourceware.org/PR27492), retain __libc_atexit and similar
@@ -364,7 +364,7 @@ template <class ELFT> void MarkLive<ELFT>::moveToMain() {
template <class ELFT> void elf::markLive() {
llvm::TimeTraceScope timeScope("markLive");
// If --gc-sections is not given, retain all input sections.
- if (!config->gcSections) {
+ if (!ctx.arg.gcSections) {
// If a DSO defines a symbol referenced in a regular object, it is needed.
for (Symbol *sym : symtab.getSymbols())
if (auto *s = dyn_cast<SharedSymbol>(sym))
@@ -387,7 +387,7 @@ template <class ELFT> void elf::markLive() {
MarkLive<ELFT>(1).moveToMain();
// Report garbage-collected sections.
- if (config->printGcSections)
+ if (ctx.arg.printGcSections)
for (InputSectionBase *sec : ctx.inputSections)
if (!sec->isLive())
message("removing unused section " + toString(sec));
diff --git a/lld/ELF/OutputSections.cpp b/lld/ELF/OutputSections.cpp
index 8ae4699f85b27d..b775eed9af2bf0 100644
--- a/lld/ELF/OutputSections.cpp
+++ b/lld/ELF/OutputSections.cpp
@@ -42,7 +42,7 @@ using namespace lld::elf;
uint32_t OutputSection::getPhdrFlags() const {
uint32_t ret = 0;
- if (config->emachine != EM_ARM || !(flags & SHF_ARM_PURECODE))
+ if (ctx.arg.emachine != EM_ARM || !(flags & SHF_ARM_PURECODE))
ret |= PF_R;
if (flags & SHF_WRITE)
ret |= PF_W;
@@ -82,7 +82,7 @@ static bool canMergeToProgbits(unsigned type) {
return type == SHT_NOBITS || type == SHT_PROGBITS || type == SHT_INIT_ARRAY ||
type == SHT_PREINIT_ARRAY || type == SHT_FINI_ARRAY ||
type == SHT_NOTE ||
- (type == SHT_X86_64_UNWIND && config->emachine == EM_X86_64);
+ (type == SHT_X86_64_UNWIND && ctx.arg.emachine == EM_X86_64);
}
// Record that isec will be placed in the OutputSection. isec does not become
@@ -130,9 +130,9 @@ void OutputSection::commitSection(InputSection *isec) {
if (type != SHT_NOBITS) {
errorOrWarn("section type mismatch for " + isec->name + "\n>>> " +
toString(isec) + ": " +
- getELFSectionTypeName(config->emachine, isec->type) +
+ getELFSectionTypeName(ctx.arg.emachine, isec->type) +
"\n>>> output section " + name + ": " +
- getELFSectionTypeName(config->emachine, type));
+ getELFSectionTypeName(ctx.arg.emachine, type));
}
}
if (!typeIsSet)
@@ -155,7 +155,7 @@ void OutputSection::commitSection(InputSection *isec) {
isec->parent = this;
uint64_t andMask =
- config->emachine == EM_ARM ? (uint64_t)SHF_ARM_PURECODE : 0;
+ ctx.arg.emachine == EM_ARM ? (uint64_t)SHF_ARM_PURECODE : 0;
uint64_t orMask = ~andMask;
uint64_t andFlags = (flags & isec->flags) & andMask;
uint64_t orFlags = (flags | isec->flags) & orMask;
@@ -176,7 +176,7 @@ static MergeSyntheticSection *createMergeSynthetic(StringRef name,
uint32_t type,
uint64_t flags,
uint32_t addralign) {
- if ((flags & SHF_STRINGS) && config->optimize >= 2)
+ if ((flags & SHF_STRINGS) && ctx.arg.optimize >= 2)
return make<MergeTailSection>(name, type, flags, addralign);
return make<MergeNoTailSection>(name, type, flags, addralign);
}
@@ -261,7 +261,7 @@ static void sortByOrder(MutableArrayRef<InputSection *> in,
}
uint64_t elf::getHeaderSize() {
- if (config->oFormatBinary)
+ if (ctx.arg.oFormatBinary)
return 0;
return ctx.out.elfHeader->size + ctx.out.programHeaders->size;
}
@@ -348,10 +348,10 @@ template <class ELFT> void OutputSection::maybeCompress() {
DebugCompressionType ctype = DebugCompressionType::None;
size_t compressedSize = sizeof(Elf_Chdr);
unsigned level = 0; // default compression level
- if (!(flags & SHF_ALLOC) && config->compressDebugSections &&
+ if (!(flags & SHF_ALLOC) && ctx.arg.compressDebugSections &&
name.starts_with(".debug_"))
- ctype = *config->compressDebugSections;
- for (auto &[glob, t, l] : config->compressSections)
+ ctype = *ctx.arg.compressDebugSections;
+ for (auto &[glob, t, l] : ctx.arg.compressSections)
if (glob.match(name))
std::tie(ctype, level) = {t, l};
if (ctype == DebugCompressionType::None)
@@ -529,7 +529,7 @@ void OutputSection::writeTo(uint8_t *buf, parallel::TaskGroup &tg) {
// When in Arm BE8 mode, the linker has to convert the big-endian
// instructions to little-endian, leaving the data big-endian.
- if (config->emachine == EM_ARM && !config->isLE && config->armBe8 &&
+ if (ctx.arg.emachine == EM_ARM && !ctx.arg.isLE && ctx.arg.armBe8 &&
(flags & SHF_EXECINSTR))
convertArmInstructionstoBE8(isec, buf + isec->outSecOff);
@@ -661,7 +661,7 @@ static size_t relToCrel(raw_svector_ostream &os, Elf_Crel<ELFT::Is64Bits> &out,
for (auto rel : rels) {
encodeOneCrel<typename ELFT::uint>(
os, out, sec->getVA(rel.r_offset), file.getRelocTargetSym(rel),
- rel.getType(config->isMips64EL), getAddend<ELFT>(rel));
+ rel.getType(ctx.arg.isMips64EL), getAddend<ELFT>(rel));
}
return rels.size();
}
@@ -690,10 +690,10 @@ template <bool is64> void OutputSection::finalizeNonAllocCrel() {
// Convert REL[A] to CREL.
if constexpr (is64) {
- totalCount += config->isLE ? relToCrel<ELF64LE>(os, out, relSec, sec)
+ totalCount += ctx.arg.isLE ? relToCrel<ELF64LE>(os, out, relSec, sec)
: relToCrel<ELF64BE>(os, out, relSec, sec);
} else {
- totalCount += config->isLE ? relToCrel<ELF32LE>(os, out, relSec, sec)
+ totalCount += ctx.arg.isLE ? relToCrel<ELF32LE>(os, out, relSec, sec)
: relToCrel<ELF32BE>(os, out, relSec, sec);
}
}
@@ -722,7 +722,7 @@ void OutputSection::finalize() {
return;
}
- if (!config->copyRelocs || !isStaticRelSecType(type))
+ if (!ctx.arg.copyRelocs || !isStaticRelSecType(type))
return;
// Skip if 'first' is synthetic, i.e. not a section created by --emit-relocs.
@@ -740,7 +740,7 @@ void OutputSection::finalize() {
flags |= SHF_INFO_LINK;
// Finalize the content of non-alloc CREL.
if (type == SHT_CREL) {
- if (config->is64)
+ if (ctx.arg.is64)
finalizeNonAllocCrel<true>();
else
finalizeNonAllocCrel<false>();
@@ -863,7 +863,7 @@ std::array<uint8_t, 4> OutputSection::getFiller() {
}
void OutputSection::checkDynRelAddends(const uint8_t *bufStart) {
- assert(config->writeAddends && config->checkDynamicRelocs);
+ assert(ctx.arg.writeAddends && ctx.arg.checkDynamicRelocs);
assert(isStaticRelSecType(type));
SmallVector<InputSection *, 0> storage;
ArrayRef<InputSection *> sections = getInputSections(*this, storage);
@@ -881,7 +881,7 @@ void OutputSection::checkDynRelAddends(const uint8_t *bufStart) {
assert(relOsec != nullptr && "missing output section for relocation");
// Some targets have NOBITS synthetic sections with dynamic relocations
// with non-zero addends. Skip such sections.
- if (is_contained({EM_PPC, EM_PPC64}, config->emachine) &&
+ if (is_contained({EM_PPC, EM_PPC64}, ctx.arg.emachine) &&
(rel.inputSec == ctx.in.ppc64LongBranchTarget.get() ||
rel.inputSec == ctx.in.igotPlt.get()))
continue;
diff --git a/lld/ELF/Target.cpp b/lld/ELF/Target.cpp
index a1f2229ad131fe..d895757ad4e49f 100644
--- a/lld/ELF/Target.cpp
+++ b/lld/ELF/Target.cpp
@@ -39,14 +39,14 @@ using namespace lld;
using namespace lld::elf;
std::string lld::toString(RelType type) {
- StringRef s = getELFRelocationTypeName(elf::config->emachine, type);
+ StringRef s = getELFRelocationTypeName(elf::ctx.arg.emachine, type);
if (s == "Unknown")
return ("Unknown (" + Twine(type) + ")").str();
return std::string(s);
}
TargetInfo *elf::getTarget() {
- switch (config->emachine) {
+ switch (ctx.arg.emachine) {
case EM_386:
case EM_IAMCU:
return getX86TargetInfo();
@@ -63,7 +63,7 @@ TargetInfo *elf::getTarget() {
case EM_LOONGARCH:
return getLoongArchTargetInfo();
case EM_MIPS:
- switch (config->ekind) {
+ switch (ctx.arg.ekind) {
case ELF32LEKind:
return getMipsTargetInfo<ELF32LE>();
case ELF32BEKind:
@@ -90,7 +90,7 @@ TargetInfo *elf::getTarget() {
case EM_X86_64:
return getX86_64TargetInfo();
default:
- fatal("unsupported e_machine value: " + Twine(config->emachine));
+ fatal("unsupported e_machine value: " + Twine(ctx.arg.emachine));
}
}
@@ -156,7 +156,7 @@ RelExpr TargetInfo::adjustGotPcExpr(RelType type, int64_t addend,
}
void TargetInfo::relocateAlloc(InputSectionBase &sec, uint8_t *buf) const {
- const unsigned bits = config->is64 ? 64 : 32;
+ const unsigned bits = ctx.arg.is64 ? 64 : 32;
uint64_t secAddr = sec.getOutputSection()->addr;
if (auto *s = dyn_cast<InputSection>(&sec))
secAddr += s->outSecOff;
@@ -175,7 +175,7 @@ void TargetInfo::relocateAlloc(InputSectionBase &sec, uint8_t *buf) const {
uint64_t TargetInfo::getImageBase() const {
// Use --image-base if set. Fall back to the target default if not.
- if (config->imageBase)
- return *config->imageBase;
- return config->isPic ? 0 : defaultImageBase;
+ if (ctx.arg.imageBase)
+ return *ctx.arg.imageBase;
+ return ctx.arg.isPic ? 0 : defaultImageBase;
}
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