[llvm] 02071a8 - Revert "[gn build] Port 64972834c193"

[Nico Weber via llvm-commits]

Author: Nico Weber
Date: 2024-09-20T11:23:43-04:00
New Revision: 02071a8d83b963da525236ac2a1bd0299d1647e1

URL: https://github.com/llvm/llvm-project/commit/02071a8d83b963da525236ac2a1bd0299d1647e1
DIFF: https://github.com/llvm/llvm-project/commit/02071a8d83b963da525236ac2a1bd0299d1647e1.diff

LOG: Revert "[gn build] Port 64972834c193"

This reverts commit 98cf6560ab6df885b6e21463f6a0a1fa5cea1eea.
64972834c193 was reverted in 9c5ad62e7440

Added: 
    

Modified: 
    llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn

Removed: 
    


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diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
index 068bdcea47014b..7861aebc7bfdb0 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
@@ -68,15 +68,6 @@ tablegen("RISCVGenPostLegalizeGICombiner") {
   td_file = "RISCVGISel.td"
 }
 
-tablegen("RISCVGenPostLegalizeGILowering") {
-  visibility = [ ":LLVMRISCVCodeGen" ]
-  args = [
-    "-gen-global-isel-combiner",
-    "-combiners=RISCVPostLegalizerLowering",
-  ]
-  td_file = "RISCVGISel.td"
-}
-
 tablegen("RISCVGenRegisterBank") {
   visibility = [ ":LLVMRISCVCodeGen" ]
   args = [ "-gen-register-bank" ]
@@ -92,7 +83,6 @@ static_library("LLVMRISCVCodeGen") {
     ":RISCVGenMacroFusion",
     ":RISCVGenO0PreLegalizeGICombiner",
     ":RISCVGenPostLegalizeGICombiner",
-    ":RISCVGenPostLegalizeGILowering",
     ":RISCVGenPreLegalizeGICombiner",
     ":RISCVGenRegisterBank",
 
@@ -119,7 +109,6 @@ static_library("LLVMRISCVCodeGen") {
     "GISel/RISCVLegalizerInfo.cpp",
     "GISel/RISCVO0PreLegalizerCombiner.cpp",
     "GISel/RISCVPostLegalizerCombiner.cpp",
-    "GISel/RISCVPostLegalizerLowering.cpp",
     "GISel/RISCVPreLegalizerCombiner.cpp",
     "GISel/RISCVRegisterBankInfo.cpp",
     "RISCVAsmPrinter.cpp",