[llvm] [MIR] Allow overriding isSSA, noPhis, noVRegs in MIR input (PR #108546)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 20 03:44:34 PDT 2024
================
@@ -398,20 +400,25 @@ void MIRParserImpl::computeFunctionProperties(MachineFunction &MF) {
}
}
}
- if (!HasPHI)
+
+ // Don't overwrite NoPHIs if the input MIR explicitly set it to false
+ if (YamlMF.NoPHIs && !HasPHI)
Properties.set(MachineFunctionProperties::Property::NoPHIs);
+
MF.setHasInlineAsm(HasInlineAsm);
if (HasTiedOps && AllTiedOpsRewritten)
Properties.set(MachineFunctionProperties::Property::TiedOpsRewritten);
- if (isSSA(MF))
+ // Don't overwrite IsSSA if the input MIR explicitly set it to false
+ if (YamlMF.IsSSA && isSSA(MF))
----------------
arsenm wrote:
This will just produce noise we don't really want printing during tests
https://github.com/llvm/llvm-project/pull/108546
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