[llvm] [AMDGPU] fix SIPeepholeSDWA optimization for fp16 (PR #109395)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> @arsenm @bfavela Do you see any issues with the two versions of MIRs? mentioned in the description.

I can't read the raw enum values. What do these print as? 

https://github.com/llvm/llvm-project/pull/109395