[llvm] [MIPS]Remove unnecessary SLL instructions on MIPS64el (PR #109386)

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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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``````````bash
git-clang-format --diff f322f4a55e8a60b996a0a9f0b3fe924c7af2cb1b 64cf138cabe5a33621a87f39d4787a2cf6935f58 --extensions cpp -- llvm/lib/Target/Mips/MipsISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 018fe52d99..084002d16d 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -519,8 +519,8 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
   setOperationAction(ISD::TRAP, MVT::Other, Legal);
 
   setTargetDAGCombine({ISD::SDIVREM, ISD::UDIVREM, ISD::SELECT, ISD::AND,
-                       ISD::OR, ISD::ADD, ISD::SUB, ISD::AssertZext, ISD::SHL
-                       ISD::SIGN_EXTEND});
+                       ISD::OR, ISD::ADD, ISD::SUB, ISD::AssertZext,
+                       ISD::SHL ISD::SIGN_EXTEND});
 
   if (Subtarget.isGP64bit())
     setMaxAtomicSizeInBitsSupported(64);
@@ -1215,8 +1215,8 @@ static SDValue performSHLCombine(SDNode *N, SelectionDAG &DAG,
 }
 
 static SDValue performSignExtendCombine(SDNode *N, SelectionDAG &DAG,
-                                    TargetLowering::DAGCombinerInfo &DCI,
-                                    const MipsSubtarget &Subtarget) {
+                                        TargetLowering::DAGCombinerInfo &DCI,
+                                        const MipsSubtarget &Subtarget) {
   SDValue N0 = N->getOperand(0);
   EVT VT = N->getValueType(0);
 
@@ -1225,9 +1225,9 @@ static SDValue performSignExtendCombine(SDNode *N, SelectionDAG &DAG,
   if (N0.getOpcode() == ISD::XOR &&
       N0.getOperand(0).getOpcode() == ISD::TRUNCATE &&
       N0.getOperand(1).getOpcode() == ISD::Constant) {
-      SDValue X0 = N0.getOperand(0).getOperand(0);
-      return DAG.getNode(ISD::XOR, SDLoc(N0), VT,
-                         X0, DAG.getTargetConstant(-1, SDLoc(N0), VT));
+    SDValue X0 = N0.getOperand(0).getOperand(0);
+    return DAG.getNode(ISD::XOR, SDLoc(N0), VT, X0,
+                       DAG.getTargetConstant(-1, SDLoc(N0), VT));
   }
 }
 

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https://github.com/llvm/llvm-project/pull/109386