[llvm] [LoongArch] Pass 'half' in the lower 16 bits of an f32 value when F extension is enabled (PR #109368)

via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 19 20:32:50 PDT 2024


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git-clang-format --diff b5cdb039712d0c24b0d10c96b6b6d52456088f84 8c8ff30c9889baba6567687c1ef0d1c584bcd596 --extensions cpp,h -- llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp llvm/lib/Target/LoongArch/LoongArchISelLowering.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index b9dbb435f3..78473e4bc4 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -1701,8 +1701,7 @@ SDValue LoongArchTargetLowering::lowerFP_TO_SINT(SDValue Op,
 
   if (Op.getValueSizeInBits() > 32 && Subtarget.hasBasicF() &&
       !Subtarget.hasBasicD()) {
-    SDValue Dst =
-        DAG.getNode(LoongArchISD::FTINT, DL, MVT::f32, Op0);
+    SDValue Dst = DAG.getNode(LoongArchISD::FTINT, DL, MVT::f32, Op0);
     return DAG.getNode(LoongArchISD::MOVFR2GR_S_LA64, DL, MVT::i64, Dst);
   }
 

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https://github.com/llvm/llvm-project/pull/109368


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