[llvm] b847076 - [Mips] Add test file for 'xor' and 'and' instructions (#106679)

[via llvm-commits]

Author: anbbna
Date: 2024-09-20T07:34:38+08:00
New Revision: b847076f55ba34374163fc8eca188fdf164a2a34

URL: https://github.com/llvm/llvm-project/commit/b847076f55ba34374163fc8eca188fdf164a2a34
DIFF: https://github.com/llvm/llvm-project/commit/b847076f55ba34374163fc8eca188fdf164a2a34.diff

LOG: [Mips] Add test file for 'xor' and 'and' instructions (#106679)

Part of #99783 

This test is meant to reflect the oncoming change as this test shows the
unoptimized result with unnecessary SLLs.

Added: 
    llvm/test/CodeGen/Mips/xor-and.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/Mips/xor-and.ll b/llvm/test/CodeGen/Mips/xor-and.ll
new file mode 100644
index 00000000000000..3a173baf205d3a
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/xor-and.ll
@@ -0,0 +1,17 @@
+; RUN: llc -O3 -mcpu=mips64r6 -mtriple=mips64el-unknown-linux-gnuabi64 < %s -o - | FileCheck %s
+
+; This test shows the unoptimized result with unnecessary SLLs.
+define noundef signext i32 @xor_and(i32 noundef signext %a, i32 noundef signext %b) local_unnamed_addr {
+; CHECK-LABEL: xor_and:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    and $1, $5, $4
+; CHECK-NEXT:    sll $1, $1, 0
+; CHECK-NEXT:    not $1, $1
+; CHECK-NEXT:    jr $ra
+; CHECK-NEXT:    sll $2, $1, 0
+
+entry:
+  %0 = and i32 %b, %a
+  %or1 = xor i32 %0, -1
+  ret i32 %or1
+}