[llvm] [llvm][ARM][CodeGen] Disable MEMCPY LDM/STM inlining for Cortex v7-m (PR #106378)

[Eli Friedman via llvm-commits]

efriedma-quic wrote:

> > It looks like later codegen passes opportunistically form ldrd/strd and ldm/stm, depending on the input values; do we want that?
> 
> I believe this is the intended behavior as this causes the best performance improvements. Switching to purely using plain load/stores doesn't provide the same performance improvement.

This makes it sound like the issue isn't the performance of ldm/stm itself, but rather that the expansion of memcpy is using too many registers.  It doesn't seem right to completely throw away the existing code because of that; it should be possible to adjust it to load/store fewer registers at a time (ldrd/strd).

It's hard for me to believe the new codegen for `@t4` is an improvement.

https://github.com/llvm/llvm-project/pull/106378