[llvm] [InstCombine] Avoid DeMorgan's on occasion (PR #109215)

[Simon Pilgrim via llvm-commits]

RKSimon wrote:

@Saldivarcher This needs to be done in DAGCombine, not InstCombine, to allow us to properly account for a target's support for ANDNOT instructions. I did an initial test yesterday, which hit infinite loops in VE and AArch64 targets, so to initially address #108731 we could just handle this in X86ISelLowering.

This is what I tried as an initial investigation inside DAGCombiner::visitAND:
```c
  // Fold (and X, (or Y, ~Z)) -> (and X, ~(and ~Y, Z))
  if (TLI.hasAndNot(SDValue(N, 0))) {
    SDValue X, Y, Z;
    if (sd_match(N, m_And(m_Value(X),
                          m_OneUse(m_Or(m_Value(Y), m_Not(m_Value(Z)))))))
      return DAG.getNode(
          ISD::AND, DL, VT, X,
          DAG.getNOT(
              DL, DAG.getNode(ISD::AND, DL, VT, DAG.getNOT(DL, Y, VT), Z), VT));
  
```

You could try just moving it to X86's combineAnd and replace the hasAndNot

https://github.com/llvm/llvm-project/pull/109215