[llvm] [AMDGPU] Promote uniform ops to I32 in DAGISel (PR #106383)

LLVM Continuous Integration via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 19 00:17:59 PDT 2024


llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `ml-opt-rel-x86-64` running on `ml-opt-rel-x86-64-b1` while building `llvm` at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/185/builds/5450

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: CodeGen/AMDGPU/load-constant-i1.ll' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
RUN: at line 2: /b/ml-opt-rel-x86-64-b1/build/bin/llc -mtriple=amdgcn-- -verify-machineinstrs < /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll | /b/ml-opt-rel-x86-64-b1/build/bin/FileCheck -check-prefix=GFX6 /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+ /b/ml-opt-rel-x86-64-b1/build/bin/FileCheck -check-prefix=GFX6 /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+ /b/ml-opt-rel-x86-64-b1/build/bin/llc -mtriple=amdgcn-- -verify-machineinstrs
RUN: at line 3: /b/ml-opt-rel-x86-64-b1/build/bin/llc -mtriple=amdgcn-- -mcpu=tonga -verify-machineinstrs < /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll | /b/ml-opt-rel-x86-64-b1/build/bin/FileCheck -check-prefix=GFX8 /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+ /b/ml-opt-rel-x86-64-b1/build/bin/FileCheck -check-prefix=GFX8 /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+ /b/ml-opt-rel-x86-64-b1/build/bin/llc -mtriple=amdgcn-- -mcpu=tonga -verify-machineinstrs
/b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll:8972:14: error: GFX8-NEXT: is not on the line after the previous match
; GFX8-NEXT: s_waitcnt vmcnt(0)
             ^
<stdin>:4279:2: note: 'next' match was here
 s_waitcnt vmcnt(0)
 ^
<stdin>:4228:64: note: previous match ended here
 buffer_store_dword v12, off, s[88:91], 0 ; 4-byte Folded Spill
                                                               ^
<stdin>:4229:1: note: non-matching line after previous match is here
 buffer_store_dword v13, off, s[88:91], 0 offset:4 ; 4-byte Folded Spill
^

Input file: <stdin>
Check file: /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll

-dump-input=help explains the following input dump.

Input was:
<<<<<<
           .
           .
           .
        4274:  v_mov_b32_e32 v2, s10 
        4275:  v_mov_b32_e32 v3, s11 
        4276:  v_mov_b32_e32 v9, s13 
        4277:  v_mov_b32_e32 v10, s14 
        4278:  v_mov_b32_e32 v11, s15 
        4279:  s_waitcnt vmcnt(0) 
next:8972      !~~~~~~~~~~~~~~~~~  error: match on wrong line
        4280:  flat_store_dwordx4 v[18:19], v[28:31] 
        4281:  flat_store_dwordx4 v[59:60], v[32:35] 
        4282:  flat_store_dwordx4 v[61:62], v[36:39] 
        4283:  flat_store_dwordx4 v[45:46], v[40:43] 
        4284:  flat_store_dwordx4 v[12:13], v[4:7] 
           .
           .
           .
>>>>>>
...

```

</details>

https://github.com/llvm/llvm-project/pull/106383


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