[llvm] [RISCV] Move the rest of Zfa FLI instruction handling to lowerConstantFP. (PR #109217)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 18 18:10:39 PDT 2024
topperc wrote:
> This patch is not NFC.
>
> ```
> ; bin/llc -mtriple=riscv64 -mattr=+zfa,+d test.ll -o -
> define float @test_float(float %x) nounwind {
> entry:
> %cmp = fcmp ult float %x, 0.000000e+00
> %sel = select i1 %cmp, float -5.000000e-01, float 5.000000e-01
> ret float %sel
> }
>
> define double @test_double(double %x) nounwind {
> entry:
> %cmp = fcmp ult double %x, 0.000000e+00
> %sel = select i1 %cmp, double -5.000000e-01, double 5.000000e-01
> ret double %sel
> }
> ```
>
> Before:
>
> ```
> test_float: # @test_float
> # %bb.0: # %entry
> fmv.w.x fa5, zero
> fle.s a0, fa5, fa0
> fli.s fa0, 0.5
> bnez a0, .LBB0_2
> # %bb.1:
> fneg.s fa0, fa0
> .LBB0_2: # %entry
> ret
>
> test_double: # @test_double
> # %bb.0: # %entry
> fmv.d.x fa5, zero
> fle.d a0, fa5, fa0
> fli.d fa0, 0.5
> bnez a0, .LBB1_2
> # %bb.1:
> fneg.d fa0, fa0
> .LBB1_2: # %entry
> ret
> ```
>
> After:
>
> ```
> test_float: # @test_float
> # %bb.0: # %entry
> fmv.w.x fa5, zero
> fle.s a0, fa5, fa0
> fli.s fa0, 0.5
> bnez a0, .LBB0_2
> # %bb.1:
> fneg.s fa0, fa0
> .LBB0_2: # %entry
> ret
>
> .LCPI1_0:
> .quad 0x3fe0000000000000 # double 0.5
> .quad 0xbfe0000000000000 # double -0.5
> .text
> .globl test_double
> .p2align 2
> .type test_double, at function
> test_double: # @test_double
> # %bb.0: # %entry
> fmv.d.x fa5, zero
> fle.d a0, fa5, fa0
> xori a0, a0, 1
> slli a0, a0, 3
> lui a1, %hi(.LCPI1_0)
> addi a1, a1, %lo(.LCPI1_0)
> add a0, a1, a0
> fld fa0, 0(a0)
> ret
> ```
Thanks. I'll take look.
https://github.com/llvm/llvm-project/pull/109217
More information about the llvm-commits
mailing list