[llvm] [NVPTX] Set v2i16 SETCC to Expand (PR #108969)

[Justin Fargnoli via llvm-commits]

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@@ -0,0 +1,72 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_80 | FileCheck %s
+; RUN: %if ptxas-11.0 %{ llc < %s -march=nvptx64 -mcpu=sm_80 -mattr=+ptx70 | %ptxas-verify -arch=sm_80 %}
+
+define <2 x i16> @sext_setcc_v2i1_to_v2i16(ptr %p) {
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justinfargnoli wrote:

Note: `v2i1 setcc` is not expanded to two `i1 setcc`s. 

```
Optimized lowered selection DAG: %bb.0 'sext_setcc_v2i1_to_v2i16:entry'
SelectionDAG has 13 nodes:
  t0: ch,glue = EntryToken
            t3: i32,ch = load<(load (s32) from `ptr addrspace(101) null`, addrspace 101)> t0, TargetExternalSymbol:i32'sext_setcc_v2i1_to_v2i16_param_0', undef:i32
          t5: v2i16,ch = load<(load (s32) from %ir.p)> t0, t3, undef:i32
          t7: v2i16 = BUILD_VECTOR Constant:i16<0>, Constant:i16<0>
        t9: v2i1 = setcc t5, t7, seteq:ch
      t10: v2i16 = sign_extend t9
    t11: ch = NVPTXISD::StoreRetval<(store (s32), align 1)> t0, Constant:i32<0>, t10
  t12: ch = NVPTXISD::RET_GLUE t11



Type-legalized selection DAG: %bb.0 'sext_setcc_v2i1_to_v2i16:entry'
SelectionDAG has 18 nodes:
  t0: ch,glue = EntryToken
    t3: i32,ch = load<(load (s32) from `ptr addrspace(101) null`, addrspace 101)> t0, TargetExternalSymbol:i32'sext_setcc_v2i1_to_v2i16_param_0', undef:i32
  t5: v2i16,ch = load<(load (s32) from %ir.p)> t0, t3, undef:i32
            t28: i16 = extract_vector_elt t5, Constant:i32<0>
          t29: i1 = setcc t28, Constant:i16<0>, seteq:ch
        t30: i16 = sign_extend t29
            t25: i16 = extract_vector_elt t5, Constant:i32<1>
          t26: i1 = setcc t25, Constant:i16<0>, seteq:ch
        t27: i16 = sign_extend t26
      t31: v2i16 = BUILD_VECTOR t30, t27
    t11: ch = NVPTXISD::StoreRetval<(store (s32), align 1)> t0, Constant:i32<0>, t31
  t12: ch = NVPTXISD::RET_GLUE t11
```

https://github.com/llvm/llvm-project/pull/108969