[llvm] 74335fb - [LLVM][TableGen] Change X86MnemonicTables to use const RecordKeeper (#109053)

[via llvm-commits]

Author: Rahul Joshi
Date: 2024-09-18T09:57:31-07:00
New Revision: 74335fb7ae7731a57a163524aeffd93911b50a46

URL: https://github.com/llvm/llvm-project/commit/74335fb7ae7731a57a163524aeffd93911b50a46
DIFF: https://github.com/llvm/llvm-project/commit/74335fb7ae7731a57a163524aeffd93911b50a46.diff

LOG: [LLVM][TableGen] Change X86MnemonicTables to use const RecordKeeper (#109053)

Change X86MnemonicTables to use const RecordKeeper.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089

Added: 
    

Modified: 
    llvm/utils/TableGen/X86MnemonicTables.cpp

Removed: 
    


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diff  --git a/llvm/utils/TableGen/X86MnemonicTables.cpp b/llvm/utils/TableGen/X86MnemonicTables.cpp
index d9ceed40f7c70d..ddbfb2af9869f4 100644
--- a/llvm/utils/TableGen/X86MnemonicTables.cpp
+++ b/llvm/utils/TableGen/X86MnemonicTables.cpp
@@ -22,10 +22,10 @@ using namespace llvm;
 namespace {
 
 class X86MnemonicTablesEmitter {
-  CodeGenTarget Target;
+  const CodeGenTarget Target;
 
 public:
-  X86MnemonicTablesEmitter(RecordKeeper &R) : Target(R) {}
+  X86MnemonicTablesEmitter(const RecordKeeper &R) : Target(R) {}
 
   // Output X86 mnemonic tables.
   void run(raw_ostream &OS);
@@ -34,15 +34,13 @@ class X86MnemonicTablesEmitter {
 void X86MnemonicTablesEmitter::run(raw_ostream &OS) {
   emitSourceFileHeader("X86 Mnemonic tables", OS);
   OS << "namespace llvm {\nnamespace X86 {\n\n";
-  Record *AsmWriter = Target.getAsmWriter();
+  const Record *AsmWriter = Target.getAsmWriter();
   unsigned Variant = AsmWriter->getValueAsInt("Variant");
 
   // Hold all instructions grouped by mnemonic
   StringMap<SmallVector<const CodeGenInstruction *, 0>> MnemonicToCGInstrMap;
 
-  ArrayRef<const CodeGenInstruction *> NumberedInstructions =
-      Target.getInstructionsByEnumValue();
-  for (const CodeGenInstruction *I : NumberedInstructions) {
+  for (const CodeGenInstruction *I : Target.getInstructionsByEnumValue()) {
     const Record *Def = I->TheDef;
     // Filter non-X86 instructions.
     if (!Def->isSubClassOf("X86Inst"))