[llvm] [AMDGPU] Add hazard workarounds to insertIndirectBranch (PR #109127)

Carl Ritson via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 18 06:02:10 PDT 2024


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@@ -2876,6 +2882,9 @@ void SIInstrInfo::insertIndirectBranch(MachineBasicBlock &MBB,
   // We need to compute the offset relative to the instruction immediately after
   // s_getpc_b64. Insert pc arithmetic code before last terminator.
   MachineInstr *GetPC = BuildMI(MBB, I, DL, get(AMDGPU::S_GETPC_B64), PCReg);
+  if (FlushSGPRWrites)
+    BuildMI(MBB, I, DL, get(AMDGPU::S_WAITCNT_DEPCTR))
+        .addImm(AMDGPU::DepCtr::encodeFieldSaSdst(0));
----------------
perlfu wrote:

Done.

https://github.com/llvm/llvm-project/pull/109127


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