[llvm] f5ad9e1 - [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (#108063)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 18 02:55:33 PDT 2024
Author: Mahesh-Attarde
Date: 2024-09-18T17:55:29+08:00
New Revision: f5ad9e1ca582216010d07e7b0ca2f3e77f71c859
URL: https://github.com/llvm/llvm-project/commit/f5ad9e1ca582216010d07e7b0ca2f3e77f71c859
DIFF: https://github.com/llvm/llvm-project/commit/f5ad9e1ca582216010d07e7b0ca2f3e77f71c859.diff
LOG: [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (#108063)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Chapter 8 AVX10 COMPARE SCALAR FP WITH ENHANCED EFLAGS INSTRUCTIONS
---------
Co-authored-by: mattarde <mattarde at intel.com>
Added:
llvm/test/MC/Disassembler/X86/avx10.2-com-ef-32.txt
llvm/test/MC/Disassembler/X86/avx10.2-com-ef-64.txt
llvm/test/MC/X86/avx10.2-com-ef-32-att.s
llvm/test/MC/X86/avx10.2-com-ef-32-intel.s
llvm/test/MC/X86/avx10.2-com-ef-64-att.s
llvm/test/MC/X86/avx10.2-com-ef-64-intel.s
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/lib/Target/X86/X86InstrAVX10.td
llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
llvm/test/CodeGen/X86/comi-flags.ll
llvm/test/TableGen/x86-fold-tables.inc
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index f6d42ade600885..9bc5f2c9399574 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -26159,22 +26159,43 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
if (CC == ISD::SETLT || CC == ISD::SETLE)
std::swap(LHS, RHS);
- SDValue Comi = DAG.getNode(IntrData->Opc0, dl, MVT::i32, LHS, RHS);
+ // For AVX10.2, Support EQ and NE.
+ bool HasAVX10_2_COMX =
+ Subtarget.hasAVX10_2() && (CC == ISD::SETEQ || CC == ISD::SETNE);
+
+ // AVX10.2 COMPARE supports only v2f64, v4f32 or v8f16.
+ // For BF type we need to fall back.
+ bool HasAVX10_2_COMX_Ty = (LHS.getSimpleValueType() != MVT::v8bf16);
+
+ auto ComiOpCode = IntrData->Opc0;
+ auto isUnordered = (ComiOpCode == X86ISD::UCOMI);
+
+ if (HasAVX10_2_COMX && HasAVX10_2_COMX_Ty)
+ ComiOpCode = isUnordered ? X86ISD::UCOMX : X86ISD::COMX;
+
+ SDValue Comi = DAG.getNode(ComiOpCode, dl, MVT::i32, LHS, RHS);
+
SDValue SetCC;
switch (CC) {
- case ISD::SETEQ: { // (ZF = 0 and PF = 0)
+ case ISD::SETEQ: {
SetCC = getSETCC(X86::COND_E, Comi, dl, DAG);
+ if (HasAVX10_2_COMX & HasAVX10_2_COMX_Ty) // ZF == 1
+ break;
+ // (ZF = 1 and PF = 0)
SDValue SetNP = getSETCC(X86::COND_NP, Comi, dl, DAG);
SetCC = DAG.getNode(ISD::AND, dl, MVT::i8, SetCC, SetNP);
break;
}
- case ISD::SETNE: { // (ZF = 1 or PF = 1)
+ case ISD::SETNE: {
SetCC = getSETCC(X86::COND_NE, Comi, dl, DAG);
+ if (HasAVX10_2_COMX & HasAVX10_2_COMX_Ty) // ZF == 0
+ break;
+ // (ZF = 0 or PF = 1)
SDValue SetP = getSETCC(X86::COND_P, Comi, dl, DAG);
SetCC = DAG.getNode(ISD::OR, dl, MVT::i8, SetCC, SetP);
break;
}
- case ISD::SETGT: // (CF = 0 and ZF = 0)
+ case ISD::SETGT: // (CF = 0 and ZF = 0)
case ISD::SETLT: { // Condition opposite to GT. Operands swapped above.
SetCC = getSETCC(X86::COND_A, Comi, dl, DAG);
break;
@@ -34083,6 +34104,8 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
NODE_NAME_CASE(STRICT_FCMPS)
NODE_NAME_CASE(COMI)
NODE_NAME_CASE(UCOMI)
+ NODE_NAME_CASE(COMX)
+ NODE_NAME_CASE(UCOMX)
NODE_NAME_CASE(CMPM)
NODE_NAME_CASE(CMPMM)
NODE_NAME_CASE(STRICT_CMPM)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index 5fb58867568012..ae7da8efb5f91a 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -87,6 +87,10 @@ namespace llvm {
COMI,
UCOMI,
+ // X86 compare with Intrinsics similar to COMI.
+ COMX,
+ UCOMX,
+
/// X86 bit-test instructions.
BT,
diff --git a/llvm/lib/Target/X86/X86InstrAVX10.td b/llvm/lib/Target/X86/X86InstrAVX10.td
index ada2bbaffd6645..f0334109a32b68 100644
--- a/llvm/lib/Target/X86/X86InstrAVX10.td
+++ b/llvm/lib/Target/X86/X86InstrAVX10.td
@@ -1537,3 +1537,49 @@ defm VFNMADD132NEPBF16 : avx10_fma3p_132_bf16<0x9C, "vfnmadd132nepbf16", X86any_
defm VFNMSUB132NEPBF16 : avx10_fma3p_132_bf16<0x9E, "vfnmsub132nepbf16", X86any_Fnmsub,
X86Fnmsub, SchedWriteFMA>;
}
+
+//-------------------------------------------------
+// AVX10 COMEF instructions
+//-------------------------------------------------
+multiclass avx10_com_ef_int<bits<8> Opc, X86VectorVTInfo _, SDNode OpNode,
+ string OpcodeStr,
+ Domain d,
+ X86FoldableSchedWrite sched = WriteFComX> {
+ let ExeDomain = d, mayRaiseFPException = 1 in {
+ def rr_Int : AVX512<Opc, MRMSrcReg, (outs), (ins _.RC:$src1, _.RC:$src2),
+ !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
+ [(set EFLAGS, (OpNode (_.VT _.RC:$src1), _.RC:$src2))]>,
+ EVEX, EVEX_V128, Sched<[sched]>, SIMD_EXC;
+ let mayLoad = 1 in {
+ def rm_Int : AVX512<Opc, MRMSrcMem, (outs), (ins _.RC:$src1, _.ScalarMemOp:$src2),
+ !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
+ [(set EFLAGS, (OpNode (_.VT _.RC:$src1), (_.LdFrag addr:$src2)))]>,
+ EVEX, EVEX_V128, Sched<[sched]>, SIMD_EXC;
+ }
+ def rrb_Int : AVX512<Opc, MRMSrcReg, (outs), (ins _.RC:$src1, _.RC:$src2),
+ !strconcat(OpcodeStr, "\t{{sae}, $src2, $src1|$src1, $src2, {sae}}"),
+ []>,
+ EVEX, EVEX_V128, EVEX_B, Sched<[sched]>, SIMD_EXC;
+ }
+}
+
+let Defs = [EFLAGS], Uses = [MXCSR], Predicates = [HasAVX10_2] in {
+ defm VCOMXSDZ : avx10_com_ef_int<0x2f, v2f64x_info, X86comi512,
+ "vcomxsd", SSEPackedDouble>,
+ TB, XS, VEX_LIG, REX_W, EVEX_CD8<64, CD8VT1>;
+ defm VCOMXSHZ : avx10_com_ef_int<0x2f, v8f16x_info, X86comi512,
+ "vcomxsh", SSEPackedSingle>,
+ T_MAP5, XD, EVEX_CD8<16, CD8VT1>;
+ defm VCOMXSSZ : avx10_com_ef_int<0x2f, v4f32x_info, X86comi512,
+ "vcomxss", SSEPackedSingle>,
+ TB, XD, VEX_LIG, EVEX_CD8<32, CD8VT1>;
+ defm VUCOMXSDZ : avx10_com_ef_int<0x2e, v2f64x_info, X86ucomi512,
+ "vucomxsd", SSEPackedDouble>,
+ TB, XS, VEX_LIG, REX_W, EVEX_CD8<64, CD8VT1>;
+ defm VUCOMXSHZ : avx10_com_ef_int<0x2e, v8f16x_info, X86ucomi512,
+ "vucomxsh", SSEPackedSingle>,
+ T_MAP5, XD, EVEX_CD8<16, CD8VT1>;
+ defm VUCOMXSSZ : avx10_com_ef_int<0x2e, v4f32x_info, X86ucomi512,
+ "vucomxss", SSEPackedSingle>,
+ TB, XD, VEX_LIG, EVEX_CD8<32, CD8VT1>;
+}
diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
index af39b1ab82d6ea..ed1bff05b7316c 100644
--- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
+++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
@@ -61,7 +61,8 @@ def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
def X86comi : SDNode<"X86ISD::COMI", SDTX86FCmp>;
def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86FCmp>;
-
+def X86comi512 : SDNode<"X86ISD::COMX", SDTX86FCmp>;
+def X86ucomi512 : SDNode<"X86ISD::UCOMX", SDTX86FCmp>;
def SDTX86Cmps : SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisSameAs<0, 1>,
SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
diff --git a/llvm/test/CodeGen/X86/comi-flags.ll b/llvm/test/CodeGen/X86/comi-flags.ll
index 8b7a089f0ce872..6f520aa57dcd09 100644
--- a/llvm/test/CodeGen/X86/comi-flags.ll
+++ b/llvm/test/CodeGen/X86/comi-flags.ll
@@ -1,6 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,NO-AVX10_2
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=AVX,AVX10_2
;
; SSE
@@ -17,15 +18,22 @@ define i32 @test_x86_sse_comieq_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i3
; SSE-NEXT: cmovnel %esi, %eax
; SSE-NEXT: retq
;
-; AVX-LABEL: test_x86_sse_comieq_ss:
-; AVX: # %bb.0:
-; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vcomiss %xmm1, %xmm0
-; AVX-NEXT: setnp %cl
-; AVX-NEXT: sete %dl
-; AVX-NEXT: testb %cl, %dl
-; AVX-NEXT: cmovnel %esi, %eax
-; AVX-NEXT: retq
+; NO-AVX10_2-LABEL: test_x86_sse_comieq_ss:
+; NO-AVX10_2: # %bb.0:
+; NO-AVX10_2-NEXT: movl %edi, %eax
+; NO-AVX10_2-NEXT: vcomiss %xmm1, %xmm0
+; NO-AVX10_2-NEXT: setnp %cl
+; NO-AVX10_2-NEXT: sete %dl
+; NO-AVX10_2-NEXT: testb %cl, %dl
+; NO-AVX10_2-NEXT: cmovnel %esi, %eax
+; NO-AVX10_2-NEXT: retq
+;
+; AVX10_2-LABEL: test_x86_sse_comieq_ss:
+; AVX10_2: # %bb.0:
+; AVX10_2-NEXT: movl %edi, %eax
+; AVX10_2-NEXT: vcomxss %xmm1, %xmm0
+; AVX10_2-NEXT: cmovel %esi, %eax
+; AVX10_2-NEXT: retq
%call = call i32 @llvm.x86.sse.comieq.ss(<4 x float> %a0, <4 x float> %a1)
%cmp = icmp eq i32 %call, 0
%res = select i1 %cmp, i32 %a2, i32 %a3
@@ -126,13 +134,20 @@ define i32 @test_x86_sse_comineq_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i
; SSE-NEXT: cmovpl %edi, %eax
; SSE-NEXT: retq
;
-; AVX-LABEL: test_x86_sse_comineq_ss:
-; AVX: # %bb.0:
-; AVX-NEXT: movl %esi, %eax
-; AVX-NEXT: vcomiss %xmm1, %xmm0
-; AVX-NEXT: cmovnel %edi, %eax
-; AVX-NEXT: cmovpl %edi, %eax
-; AVX-NEXT: retq
+; NO-AVX10_2-LABEL: test_x86_sse_comineq_ss:
+; NO-AVX10_2: # %bb.0:
+; NO-AVX10_2-NEXT: movl %esi, %eax
+; NO-AVX10_2-NEXT: vcomiss %xmm1, %xmm0
+; NO-AVX10_2-NEXT: cmovnel %edi, %eax
+; NO-AVX10_2-NEXT: cmovpl %edi, %eax
+; NO-AVX10_2-NEXT: retq
+;
+; AVX10_2-LABEL: test_x86_sse_comineq_ss:
+; AVX10_2: # %bb.0:
+; AVX10_2-NEXT: movl %edi, %eax
+; AVX10_2-NEXT: vcomxss %xmm1, %xmm0
+; AVX10_2-NEXT: cmovel %esi, %eax
+; AVX10_2-NEXT: retq
%call = call i32 @llvm.x86.sse.comineq.ss(<4 x float> %a0, <4 x float> %a1)
%cmp = icmp ne i32 %call, 0
%res = select i1 %cmp, i32 %a2, i32 %a3
@@ -151,15 +166,22 @@ define i32 @test_x86_sse_ucomieq_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i
; SSE-NEXT: cmovnel %esi, %eax
; SSE-NEXT: retq
;
-; AVX-LABEL: test_x86_sse_ucomieq_ss:
-; AVX: # %bb.0:
-; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vucomiss %xmm1, %xmm0
-; AVX-NEXT: setnp %cl
-; AVX-NEXT: sete %dl
-; AVX-NEXT: testb %cl, %dl
-; AVX-NEXT: cmovnel %esi, %eax
-; AVX-NEXT: retq
+; NO-AVX10_2-LABEL: test_x86_sse_ucomieq_ss:
+; NO-AVX10_2: # %bb.0:
+; NO-AVX10_2-NEXT: movl %edi, %eax
+; NO-AVX10_2-NEXT: vucomiss %xmm1, %xmm0
+; NO-AVX10_2-NEXT: setnp %cl
+; NO-AVX10_2-NEXT: sete %dl
+; NO-AVX10_2-NEXT: testb %cl, %dl
+; NO-AVX10_2-NEXT: cmovnel %esi, %eax
+; NO-AVX10_2-NEXT: retq
+;
+; AVX10_2-LABEL: test_x86_sse_ucomieq_ss:
+; AVX10_2: # %bb.0:
+; AVX10_2-NEXT: movl %edi, %eax
+; AVX10_2-NEXT: vucomxss %xmm1, %xmm0
+; AVX10_2-NEXT: cmovel %esi, %eax
+; AVX10_2-NEXT: retq
%call = call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> %a0, <4 x float> %a1)
%cmp = icmp eq i32 %call, 0
%res = select i1 %cmp, i32 %a2, i32 %a3
@@ -260,13 +282,20 @@ define i32 @test_x86_sse_ucomineq_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2,
; SSE-NEXT: cmovpl %edi, %eax
; SSE-NEXT: retq
;
-; AVX-LABEL: test_x86_sse_ucomineq_ss:
-; AVX: # %bb.0:
-; AVX-NEXT: movl %esi, %eax
-; AVX-NEXT: vucomiss %xmm1, %xmm0
-; AVX-NEXT: cmovnel %edi, %eax
-; AVX-NEXT: cmovpl %edi, %eax
-; AVX-NEXT: retq
+; NO-AVX10_2-LABEL: test_x86_sse_ucomineq_ss:
+; NO-AVX10_2: # %bb.0:
+; NO-AVX10_2-NEXT: movl %esi, %eax
+; NO-AVX10_2-NEXT: vucomiss %xmm1, %xmm0
+; NO-AVX10_2-NEXT: cmovnel %edi, %eax
+; NO-AVX10_2-NEXT: cmovpl %edi, %eax
+; NO-AVX10_2-NEXT: retq
+;
+; AVX10_2-LABEL: test_x86_sse_ucomineq_ss:
+; AVX10_2: # %bb.0:
+; AVX10_2-NEXT: movl %edi, %eax
+; AVX10_2-NEXT: vucomxss %xmm1, %xmm0
+; AVX10_2-NEXT: cmovel %esi, %eax
+; AVX10_2-NEXT: retq
%call = call i32 @llvm.x86.sse.ucomineq.ss(<4 x float> %a0, <4 x float> %a1)
%cmp = icmp ne i32 %call, 0
%res = select i1 %cmp, i32 %a2, i32 %a3
@@ -289,15 +318,22 @@ define i32 @test_x86_sse2_comieq_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2,
; SSE-NEXT: cmovnel %esi, %eax
; SSE-NEXT: retq
;
-; AVX-LABEL: test_x86_sse2_comieq_sd:
-; AVX: # %bb.0:
-; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vcomisd %xmm1, %xmm0
-; AVX-NEXT: setnp %cl
-; AVX-NEXT: sete %dl
-; AVX-NEXT: testb %cl, %dl
-; AVX-NEXT: cmovnel %esi, %eax
-; AVX-NEXT: retq
+; NO-AVX10_2-LABEL: test_x86_sse2_comieq_sd:
+; NO-AVX10_2: # %bb.0:
+; NO-AVX10_2-NEXT: movl %edi, %eax
+; NO-AVX10_2-NEXT: vcomisd %xmm1, %xmm0
+; NO-AVX10_2-NEXT: setnp %cl
+; NO-AVX10_2-NEXT: sete %dl
+; NO-AVX10_2-NEXT: testb %cl, %dl
+; NO-AVX10_2-NEXT: cmovnel %esi, %eax
+; NO-AVX10_2-NEXT: retq
+;
+; AVX10_2-LABEL: test_x86_sse2_comieq_sd:
+; AVX10_2: # %bb.0:
+; AVX10_2-NEXT: movl %edi, %eax
+; AVX10_2-NEXT: vcomxsd %xmm1, %xmm0
+; AVX10_2-NEXT: cmovel %esi, %eax
+; AVX10_2-NEXT: retq
%call = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
%cmp = icmp eq i32 %call, 0
%res = select i1 %cmp, i32 %a2, i32 %a3
@@ -398,13 +434,20 @@ define i32 @test_x86_sse2_comineq_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2
; SSE-NEXT: cmovpl %edi, %eax
; SSE-NEXT: retq
;
-; AVX-LABEL: test_x86_sse2_comineq_sd:
-; AVX: # %bb.0:
-; AVX-NEXT: movl %esi, %eax
-; AVX-NEXT: vcomisd %xmm1, %xmm0
-; AVX-NEXT: cmovnel %edi, %eax
-; AVX-NEXT: cmovpl %edi, %eax
-; AVX-NEXT: retq
+; NO-AVX10_2-LABEL: test_x86_sse2_comineq_sd:
+; NO-AVX10_2: # %bb.0:
+; NO-AVX10_2-NEXT: movl %esi, %eax
+; NO-AVX10_2-NEXT: vcomisd %xmm1, %xmm0
+; NO-AVX10_2-NEXT: cmovnel %edi, %eax
+; NO-AVX10_2-NEXT: cmovpl %edi, %eax
+; NO-AVX10_2-NEXT: retq
+;
+; AVX10_2-LABEL: test_x86_sse2_comineq_sd:
+; AVX10_2: # %bb.0:
+; AVX10_2-NEXT: movl %edi, %eax
+; AVX10_2-NEXT: vcomxsd %xmm1, %xmm0
+; AVX10_2-NEXT: cmovel %esi, %eax
+; AVX10_2-NEXT: retq
%call = call i32 @llvm.x86.sse2.comineq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
%cmp = icmp ne i32 %call, 0
%res = select i1 %cmp, i32 %a2, i32 %a3
@@ -423,15 +466,22 @@ define i32 @test_x86_sse2_ucomieq_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2
; SSE-NEXT: cmovnel %esi, %eax
; SSE-NEXT: retq
;
-; AVX-LABEL: test_x86_sse2_ucomieq_sd:
-; AVX: # %bb.0:
-; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vucomisd %xmm1, %xmm0
-; AVX-NEXT: setnp %cl
-; AVX-NEXT: sete %dl
-; AVX-NEXT: testb %cl, %dl
-; AVX-NEXT: cmovnel %esi, %eax
-; AVX-NEXT: retq
+; NO-AVX10_2-LABEL: test_x86_sse2_ucomieq_sd:
+; NO-AVX10_2: # %bb.0:
+; NO-AVX10_2-NEXT: movl %edi, %eax
+; NO-AVX10_2-NEXT: vucomisd %xmm1, %xmm0
+; NO-AVX10_2-NEXT: setnp %cl
+; NO-AVX10_2-NEXT: sete %dl
+; NO-AVX10_2-NEXT: testb %cl, %dl
+; NO-AVX10_2-NEXT: cmovnel %esi, %eax
+; NO-AVX10_2-NEXT: retq
+;
+; AVX10_2-LABEL: test_x86_sse2_ucomieq_sd:
+; AVX10_2: # %bb.0:
+; AVX10_2-NEXT: movl %edi, %eax
+; AVX10_2-NEXT: vucomxsd %xmm1, %xmm0
+; AVX10_2-NEXT: cmovel %esi, %eax
+; AVX10_2-NEXT: retq
%call = call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
%cmp = icmp eq i32 %call, 0
%res = select i1 %cmp, i32 %a2, i32 %a3
@@ -532,13 +582,20 @@ define i32 @test_x86_sse2_ucomineq_sd(<2 x double> %a0, <2 x double> %a1, i32 %a
; SSE-NEXT: cmovpl %edi, %eax
; SSE-NEXT: retq
;
-; AVX-LABEL: test_x86_sse2_ucomineq_sd:
-; AVX: # %bb.0:
-; AVX-NEXT: movl %esi, %eax
-; AVX-NEXT: vucomisd %xmm1, %xmm0
-; AVX-NEXT: cmovnel %edi, %eax
-; AVX-NEXT: cmovpl %edi, %eax
-; AVX-NEXT: retq
+; NO-AVX10_2-LABEL: test_x86_sse2_ucomineq_sd:
+; NO-AVX10_2: # %bb.0:
+; NO-AVX10_2-NEXT: movl %esi, %eax
+; NO-AVX10_2-NEXT: vucomisd %xmm1, %xmm0
+; NO-AVX10_2-NEXT: cmovnel %edi, %eax
+; NO-AVX10_2-NEXT: cmovpl %edi, %eax
+; NO-AVX10_2-NEXT: retq
+;
+; AVX10_2-LABEL: test_x86_sse2_ucomineq_sd:
+; AVX10_2: # %bb.0:
+; AVX10_2-NEXT: movl %edi, %eax
+; AVX10_2-NEXT: vucomxsd %xmm1, %xmm0
+; AVX10_2-NEXT: cmovel %esi, %eax
+; AVX10_2-NEXT: retq
%call = call i32 @llvm.x86.sse2.ucomineq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
%cmp = icmp ne i32 %call, 0
%res = select i1 %cmp, i32 %a2, i32 %a3
@@ -557,15 +614,22 @@ define void @PR38960_eq(<4 x float> %A, <4 x float> %B) {
; SSE-NEXT: # %bb.1: # %if.end
; SSE-NEXT: retq
;
-; AVX-LABEL: PR38960_eq:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcomiss %xmm1, %xmm0
-; AVX-NEXT: setnp %al
-; AVX-NEXT: sete %cl
-; AVX-NEXT: testb %al, %cl
-; AVX-NEXT: jne foo at PLT # TAILCALL
-; AVX-NEXT: # %bb.1: # %if.end
-; AVX-NEXT: retq
+; NO-AVX10_2-LABEL: PR38960_eq:
+; NO-AVX10_2: # %bb.0: # %entry
+; NO-AVX10_2-NEXT: vcomiss %xmm1, %xmm0
+; NO-AVX10_2-NEXT: setnp %al
+; NO-AVX10_2-NEXT: sete %cl
+; NO-AVX10_2-NEXT: testb %al, %cl
+; NO-AVX10_2-NEXT: jne foo at PLT # TAILCALL
+; NO-AVX10_2-NEXT: # %bb.1: # %if.end
+; NO-AVX10_2-NEXT: retq
+;
+; AVX10_2-LABEL: PR38960_eq:
+; AVX10_2: # %bb.0: # %entry
+; AVX10_2-NEXT: vcomxss %xmm1, %xmm0
+; AVX10_2-NEXT: je foo at PLT # TAILCALL
+; AVX10_2-NEXT: # %bb.1: # %if.end
+; AVX10_2-NEXT: retq
entry:
%call = tail call i32 @llvm.x86.sse.comieq.ss(<4 x float> %A, <4 x float> %B) #3
%cmp = icmp eq i32 %call, 0
@@ -590,15 +654,22 @@ define void @PR38960_neq(<4 x float> %A, <4 x float> %B) {
; SSE-NEXT: # %bb.1: # %if.end
; SSE-NEXT: retq
;
-; AVX-LABEL: PR38960_neq:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcomiss %xmm1, %xmm0
-; AVX-NEXT: setp %al
-; AVX-NEXT: setne %cl
-; AVX-NEXT: orb %al, %cl
-; AVX-NEXT: jne foo at PLT # TAILCALL
-; AVX-NEXT: # %bb.1: # %if.end
-; AVX-NEXT: retq
+; NO-AVX10_2-LABEL: PR38960_neq:
+; NO-AVX10_2: # %bb.0: # %entry
+; NO-AVX10_2-NEXT: vcomiss %xmm1, %xmm0
+; NO-AVX10_2-NEXT: setp %al
+; NO-AVX10_2-NEXT: setne %cl
+; NO-AVX10_2-NEXT: orb %al, %cl
+; NO-AVX10_2-NEXT: jne foo at PLT # TAILCALL
+; NO-AVX10_2-NEXT: # %bb.1: # %if.end
+; NO-AVX10_2-NEXT: retq
+;
+; AVX10_2-LABEL: PR38960_neq:
+; AVX10_2: # %bb.0: # %entry
+; AVX10_2-NEXT: vcomxss %xmm1, %xmm0
+; AVX10_2-NEXT: jne foo at PLT # TAILCALL
+; AVX10_2-NEXT: # %bb.1: # %if.end
+; AVX10_2-NEXT: retq
entry:
%call = tail call i32 @llvm.x86.sse.comineq.ss(<4 x float> %A, <4 x float> %B) #3
%cmp = icmp eq i32 %call, 0
diff --git a/llvm/test/MC/Disassembler/X86/avx10.2-com-ef-32.txt b/llvm/test/MC/Disassembler/X86/avx10.2-com-ef-32.txt
new file mode 100644
index 00000000000000..e7adacbbf88c88
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/avx10.2-com-ef-32.txt
@@ -0,0 +1,195 @@
+# RUN: llvm-mc --disassemble %s -triple=i386 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=i386 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT: vcomxsd %xmm3, %xmm2
+# INTEL: vcomxsd xmm2, xmm3
+0x62,0xf1,0xfe,0x08,0x2f,0xd3
+
+# ATT: vcomxsd {sae}, %xmm3, %xmm2
+# INTEL: vcomxsd xmm2, xmm3, {sae}
+0x62,0xf1,0xfe,0x18,0x2f,0xd3
+
+# ATT: vcomxsd 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcomxsd xmm2, qword ptr [esp + 8*esi + 268435456]
+0x62,0xf1,0xfe,0x08,0x2f,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcomxsd 291(%edi,%eax,4), %xmm2
+# INTEL: vcomxsd xmm2, qword ptr [edi + 4*eax + 291]
+0x62,0xf1,0xfe,0x08,0x2f,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcomxsd (%eax), %xmm2
+# INTEL: vcomxsd xmm2, qword ptr [eax]
+0x62,0xf1,0xfe,0x08,0x2f,0x10
+
+# ATT: vcomxsd -256(,%ebp,2), %xmm2
+# INTEL: vcomxsd xmm2, qword ptr [2*ebp - 256]
+0x62,0xf1,0xfe,0x08,0x2f,0x14,0x6d,0x00,0xff,0xff,0xff
+
+# ATT: vcomxsd 1016(%ecx), %xmm2
+# INTEL: vcomxsd xmm2, qword ptr [ecx + 1016]
+0x62,0xf1,0xfe,0x08,0x2f,0x51,0x7f
+
+# ATT: vcomxsd -1024(%edx), %xmm2
+# INTEL: vcomxsd xmm2, qword ptr [edx - 1024]
+0x62,0xf1,0xfe,0x08,0x2f,0x52,0x80
+
+# ATT: vcomxsh %xmm3, %xmm2
+# INTEL: vcomxsh xmm2, xmm3
+0x62,0xf5,0x7f,0x08,0x2f,0xd3
+
+# ATT: vcomxsh {sae}, %xmm3, %xmm2
+# INTEL: vcomxsh xmm2, xmm3, {sae}
+0x62,0xf5,0x7f,0x18,0x2f,0xd3
+
+# ATT: vcomxsh 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcomxsh xmm2, word ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x08,0x2f,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcomxsh 291(%edi,%eax,4), %xmm2
+# INTEL: vcomxsh xmm2, word ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x08,0x2f,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcomxsh (%eax), %xmm2
+# INTEL: vcomxsh xmm2, word ptr [eax]
+0x62,0xf5,0x7f,0x08,0x2f,0x10
+
+# ATT: vcomxsh -64(,%ebp,2), %xmm2
+# INTEL: vcomxsh xmm2, word ptr [2*ebp - 64]
+0x62,0xf5,0x7f,0x08,0x2f,0x14,0x6d,0xc0,0xff,0xff,0xff
+
+# ATT: vcomxsh 254(%ecx), %xmm2
+# INTEL: vcomxsh xmm2, word ptr [ecx + 254]
+0x62,0xf5,0x7f,0x08,0x2f,0x51,0x7f
+
+# ATT: vcomxsh -256(%edx), %xmm2
+# INTEL: vcomxsh xmm2, word ptr [edx - 256]
+0x62,0xf5,0x7f,0x08,0x2f,0x52,0x80
+
+# ATT: vcomxss %xmm3, %xmm2
+# INTEL: vcomxss xmm2, xmm3
+0x62,0xf1,0x7f,0x08,0x2f,0xd3
+
+# ATT: vcomxss {sae}, %xmm3, %xmm2
+# INTEL: vcomxss xmm2, xmm3, {sae}
+0x62,0xf1,0x7f,0x18,0x2f,0xd3
+
+# ATT: vcomxss 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcomxss xmm2, dword ptr [esp + 8*esi + 268435456]
+0x62,0xf1,0x7f,0x08,0x2f,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcomxss 291(%edi,%eax,4), %xmm2
+# INTEL: vcomxss xmm2, dword ptr [edi + 4*eax + 291]
+0x62,0xf1,0x7f,0x08,0x2f,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcomxss (%eax), %xmm2
+# INTEL: vcomxss xmm2, dword ptr [eax]
+0x62,0xf1,0x7f,0x08,0x2f,0x10
+
+# ATT: vcomxss -128(,%ebp,2), %xmm2
+# INTEL: vcomxss xmm2, dword ptr [2*ebp - 128]
+0x62,0xf1,0x7f,0x08,0x2f,0x14,0x6d,0x80,0xff,0xff,0xff
+
+# ATT: vcomxss 508(%ecx), %xmm2
+# INTEL: vcomxss xmm2, dword ptr [ecx + 508]
+0x62,0xf1,0x7f,0x08,0x2f,0x51,0x7f
+
+# ATT: vcomxss -512(%edx), %xmm2
+# INTEL: vcomxss xmm2, dword ptr [edx - 512]
+0x62,0xf1,0x7f,0x08,0x2f,0x52,0x80
+
+# ATT: vucomxsd %xmm3, %xmm2
+# INTEL: vucomxsd xmm2, xmm3
+0x62,0xf1,0xfe,0x08,0x2e,0xd3
+
+# ATT: vucomxsd {sae}, %xmm3, %xmm2
+# INTEL: vucomxsd xmm2, xmm3, {sae}
+0x62,0xf1,0xfe,0x18,0x2e,0xd3
+
+# ATT: vucomxsd 268435456(%esp,%esi,8), %xmm2
+# INTEL: vucomxsd xmm2, qword ptr [esp + 8*esi + 268435456]
+0x62,0xf1,0xfe,0x08,0x2e,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vucomxsd 291(%edi,%eax,4), %xmm2
+# INTEL: vucomxsd xmm2, qword ptr [edi + 4*eax + 291]
+0x62,0xf1,0xfe,0x08,0x2e,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vucomxsd (%eax), %xmm2
+# INTEL: vucomxsd xmm2, qword ptr [eax]
+0x62,0xf1,0xfe,0x08,0x2e,0x10
+
+# ATT: vucomxsd -256(,%ebp,2), %xmm2
+# INTEL: vucomxsd xmm2, qword ptr [2*ebp - 256]
+0x62,0xf1,0xfe,0x08,0x2e,0x14,0x6d,0x00,0xff,0xff,0xff
+
+# ATT: vucomxsd 1016(%ecx), %xmm2
+# INTEL: vucomxsd xmm2, qword ptr [ecx + 1016]
+0x62,0xf1,0xfe,0x08,0x2e,0x51,0x7f
+
+# ATT: vucomxsd -1024(%edx), %xmm2
+# INTEL: vucomxsd xmm2, qword ptr [edx - 1024]
+0x62,0xf1,0xfe,0x08,0x2e,0x52,0x80
+
+# ATT: vucomxsh %xmm3, %xmm2
+# INTEL: vucomxsh xmm2, xmm3
+0x62,0xf5,0x7f,0x08,0x2e,0xd3
+
+# ATT: vucomxsh {sae}, %xmm3, %xmm2
+# INTEL: vucomxsh xmm2, xmm3, {sae}
+0x62,0xf5,0x7f,0x18,0x2e,0xd3
+
+# ATT: vucomxsh 268435456(%esp,%esi,8), %xmm2
+# INTEL: vucomxsh xmm2, word ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x08,0x2e,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vucomxsh 291(%edi,%eax,4), %xmm2
+# INTEL: vucomxsh xmm2, word ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x08,0x2e,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vucomxsh (%eax), %xmm2
+# INTEL: vucomxsh xmm2, word ptr [eax]
+0x62,0xf5,0x7f,0x08,0x2e,0x10
+
+# ATT: vucomxsh -64(,%ebp,2), %xmm2
+# INTEL: vucomxsh xmm2, word ptr [2*ebp - 64]
+0x62,0xf5,0x7f,0x08,0x2e,0x14,0x6d,0xc0,0xff,0xff,0xff
+
+# ATT: vucomxsh 254(%ecx), %xmm2
+# INTEL: vucomxsh xmm2, word ptr [ecx + 254]
+0x62,0xf5,0x7f,0x08,0x2e,0x51,0x7f
+
+# ATT: vucomxsh -256(%edx), %xmm2
+# INTEL: vucomxsh xmm2, word ptr [edx - 256]
+0x62,0xf5,0x7f,0x08,0x2e,0x52,0x80
+
+# ATT: vucomxss %xmm3, %xmm2
+# INTEL: vucomxss xmm2, xmm3
+0x62,0xf1,0x7f,0x08,0x2e,0xd3
+
+# ATT: vucomxss {sae}, %xmm3, %xmm2
+# INTEL: vucomxss xmm2, xmm3, {sae}
+0x62,0xf1,0x7f,0x18,0x2e,0xd3
+
+# ATT: vucomxss 268435456(%esp,%esi,8), %xmm2
+# INTEL: vucomxss xmm2, dword ptr [esp + 8*esi + 268435456]
+0x62,0xf1,0x7f,0x08,0x2e,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vucomxss 291(%edi,%eax,4), %xmm2
+# INTEL: vucomxss xmm2, dword ptr [edi + 4*eax + 291]
+0x62,0xf1,0x7f,0x08,0x2e,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vucomxss (%eax), %xmm2
+# INTEL: vucomxss xmm2, dword ptr [eax]
+0x62,0xf1,0x7f,0x08,0x2e,0x10
+
+# ATT: vucomxss -128(,%ebp,2), %xmm2
+# INTEL: vucomxss xmm2, dword ptr [2*ebp - 128]
+0x62,0xf1,0x7f,0x08,0x2e,0x14,0x6d,0x80,0xff,0xff,0xff
+
+# ATT: vucomxss 508(%ecx), %xmm2
+# INTEL: vucomxss xmm2, dword ptr [ecx + 508]
+0x62,0xf1,0x7f,0x08,0x2e,0x51,0x7f
+
+# ATT: vucomxss -512(%edx), %xmm2
+# INTEL: vucomxss xmm2, dword ptr [edx - 512]
+0x62,0xf1,0x7f,0x08,0x2e,0x52,0x80
+
diff --git a/llvm/test/MC/Disassembler/X86/avx10.2-com-ef-64.txt b/llvm/test/MC/Disassembler/X86/avx10.2-com-ef-64.txt
new file mode 100644
index 00000000000000..ea580fe8d50836
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/avx10.2-com-ef-64.txt
@@ -0,0 +1,195 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT: vcomxsd %xmm23, %xmm22
+# INTEL: vcomxsd xmm22, xmm23
+0x62,0xa1,0xfe,0x08,0x2f,0xf7
+
+# ATT: vcomxsd {sae}, %xmm23, %xmm22
+# INTEL: vcomxsd xmm22, xmm23, {sae}
+0x62,0xa1,0xfe,0x18,0x2f,0xf7
+
+# ATT: vcomxsd 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcomxsd xmm22, qword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa1,0xfe,0x08,0x2f,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcomxsd 291(%r8,%rax,4), %xmm22
+# INTEL: vcomxsd xmm22, qword ptr [r8 + 4*rax + 291]
+0x62,0xc1,0xfe,0x08,0x2f,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcomxsd (%rip), %xmm22
+# INTEL: vcomxsd xmm22, qword ptr [rip]
+0x62,0xe1,0xfe,0x08,0x2f,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcomxsd -256(,%rbp,2), %xmm22
+# INTEL: vcomxsd xmm22, qword ptr [2*rbp - 256]
+0x62,0xe1,0xfe,0x08,0x2f,0x34,0x6d,0x00,0xff,0xff,0xff
+
+# ATT: vcomxsd 1016(%rcx), %xmm22
+# INTEL: vcomxsd xmm22, qword ptr [rcx + 1016]
+0x62,0xe1,0xfe,0x08,0x2f,0x71,0x7f
+
+# ATT: vcomxsd -1024(%rdx), %xmm22
+# INTEL: vcomxsd xmm22, qword ptr [rdx - 1024]
+0x62,0xe1,0xfe,0x08,0x2f,0x72,0x80
+
+# ATT: vcomxsh %xmm23, %xmm22
+# INTEL: vcomxsh xmm22, xmm23
+0x62,0xa5,0x7f,0x08,0x2f,0xf7
+
+# ATT: vcomxsh {sae}, %xmm23, %xmm22
+# INTEL: vcomxsh xmm22, xmm23, {sae}
+0x62,0xa5,0x7f,0x18,0x2f,0xf7
+
+# ATT: vcomxsh 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcomxsh xmm22, word ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x08,0x2f,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcomxsh 291(%r8,%rax,4), %xmm22
+# INTEL: vcomxsh xmm22, word ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x08,0x2f,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcomxsh (%rip), %xmm22
+# INTEL: vcomxsh xmm22, word ptr [rip]
+0x62,0xe5,0x7f,0x08,0x2f,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcomxsh -64(,%rbp,2), %xmm22
+# INTEL: vcomxsh xmm22, word ptr [2*rbp - 64]
+0x62,0xe5,0x7f,0x08,0x2f,0x34,0x6d,0xc0,0xff,0xff,0xff
+
+# ATT: vcomxsh 254(%rcx), %xmm22
+# INTEL: vcomxsh xmm22, word ptr [rcx + 254]
+0x62,0xe5,0x7f,0x08,0x2f,0x71,0x7f
+
+# ATT: vcomxsh -256(%rdx), %xmm22
+# INTEL: vcomxsh xmm22, word ptr [rdx - 256]
+0x62,0xe5,0x7f,0x08,0x2f,0x72,0x80
+
+# ATT: vcomxss %xmm23, %xmm22
+# INTEL: vcomxss xmm22, xmm23
+0x62,0xa1,0x7f,0x08,0x2f,0xf7
+
+# ATT: vcomxss {sae}, %xmm23, %xmm22
+# INTEL: vcomxss xmm22, xmm23, {sae}
+0x62,0xa1,0x7f,0x18,0x2f,0xf7
+
+# ATT: vcomxss 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcomxss xmm22, dword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa1,0x7f,0x08,0x2f,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcomxss 291(%r8,%rax,4), %xmm22
+# INTEL: vcomxss xmm22, dword ptr [r8 + 4*rax + 291]
+0x62,0xc1,0x7f,0x08,0x2f,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcomxss (%rip), %xmm22
+# INTEL: vcomxss xmm22, dword ptr [rip]
+0x62,0xe1,0x7f,0x08,0x2f,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcomxss -128(,%rbp,2), %xmm22
+# INTEL: vcomxss xmm22, dword ptr [2*rbp - 128]
+0x62,0xe1,0x7f,0x08,0x2f,0x34,0x6d,0x80,0xff,0xff,0xff
+
+# ATT: vcomxss 508(%rcx), %xmm22
+# INTEL: vcomxss xmm22, dword ptr [rcx + 508]
+0x62,0xe1,0x7f,0x08,0x2f,0x71,0x7f
+
+# ATT: vcomxss -512(%rdx), %xmm22
+# INTEL: vcomxss xmm22, dword ptr [rdx - 512]
+0x62,0xe1,0x7f,0x08,0x2f,0x72,0x80
+
+# ATT: vucomxsd %xmm23, %xmm22
+# INTEL: vucomxsd xmm22, xmm23
+0x62,0xa1,0xfe,0x08,0x2e,0xf7
+
+# ATT: vucomxsd {sae}, %xmm23, %xmm22
+# INTEL: vucomxsd xmm22, xmm23, {sae}
+0x62,0xa1,0xfe,0x18,0x2e,0xf7
+
+# ATT: vucomxsd 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vucomxsd xmm22, qword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa1,0xfe,0x08,0x2e,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vucomxsd 291(%r8,%rax,4), %xmm22
+# INTEL: vucomxsd xmm22, qword ptr [r8 + 4*rax + 291]
+0x62,0xc1,0xfe,0x08,0x2e,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vucomxsd (%rip), %xmm22
+# INTEL: vucomxsd xmm22, qword ptr [rip]
+0x62,0xe1,0xfe,0x08,0x2e,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vucomxsd -256(,%rbp,2), %xmm22
+# INTEL: vucomxsd xmm22, qword ptr [2*rbp - 256]
+0x62,0xe1,0xfe,0x08,0x2e,0x34,0x6d,0x00,0xff,0xff,0xff
+
+# ATT: vucomxsd 1016(%rcx), %xmm22
+# INTEL: vucomxsd xmm22, qword ptr [rcx + 1016]
+0x62,0xe1,0xfe,0x08,0x2e,0x71,0x7f
+
+# ATT: vucomxsd -1024(%rdx), %xmm22
+# INTEL: vucomxsd xmm22, qword ptr [rdx - 1024]
+0x62,0xe1,0xfe,0x08,0x2e,0x72,0x80
+
+# ATT: vucomxsh %xmm23, %xmm22
+# INTEL: vucomxsh xmm22, xmm23
+0x62,0xa5,0x7f,0x08,0x2e,0xf7
+
+# ATT: vucomxsh {sae}, %xmm23, %xmm22
+# INTEL: vucomxsh xmm22, xmm23, {sae}
+0x62,0xa5,0x7f,0x18,0x2e,0xf7
+
+# ATT: vucomxsh 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vucomxsh xmm22, word ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x08,0x2e,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vucomxsh 291(%r8,%rax,4), %xmm22
+# INTEL: vucomxsh xmm22, word ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x08,0x2e,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vucomxsh (%rip), %xmm22
+# INTEL: vucomxsh xmm22, word ptr [rip]
+0x62,0xe5,0x7f,0x08,0x2e,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vucomxsh -64(,%rbp,2), %xmm22
+# INTEL: vucomxsh xmm22, word ptr [2*rbp - 64]
+0x62,0xe5,0x7f,0x08,0x2e,0x34,0x6d,0xc0,0xff,0xff,0xff
+
+# ATT: vucomxsh 254(%rcx), %xmm22
+# INTEL: vucomxsh xmm22, word ptr [rcx + 254]
+0x62,0xe5,0x7f,0x08,0x2e,0x71,0x7f
+
+# ATT: vucomxsh -256(%rdx), %xmm22
+# INTEL: vucomxsh xmm22, word ptr [rdx - 256]
+0x62,0xe5,0x7f,0x08,0x2e,0x72,0x80
+
+# ATT: vucomxss %xmm23, %xmm22
+# INTEL: vucomxss xmm22, xmm23
+0x62,0xa1,0x7f,0x08,0x2e,0xf7
+
+# ATT: vucomxss {sae}, %xmm23, %xmm22
+# INTEL: vucomxss xmm22, xmm23, {sae}
+0x62,0xa1,0x7f,0x18,0x2e,0xf7
+
+# ATT: vucomxss 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vucomxss xmm22, dword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa1,0x7f,0x08,0x2e,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vucomxss 291(%r8,%rax,4), %xmm22
+# INTEL: vucomxss xmm22, dword ptr [r8 + 4*rax + 291]
+0x62,0xc1,0x7f,0x08,0x2e,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vucomxss (%rip), %xmm22
+# INTEL: vucomxss xmm22, dword ptr [rip]
+0x62,0xe1,0x7f,0x08,0x2e,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vucomxss -128(,%rbp,2), %xmm22
+# INTEL: vucomxss xmm22, dword ptr [2*rbp - 128]
+0x62,0xe1,0x7f,0x08,0x2e,0x34,0x6d,0x80,0xff,0xff,0xff
+
+# ATT: vucomxss 508(%rcx), %xmm22
+# INTEL: vucomxss xmm22, dword ptr [rcx + 508]
+0x62,0xe1,0x7f,0x08,0x2e,0x71,0x7f
+
+# ATT: vucomxss -512(%rdx), %xmm22
+# INTEL: vucomxss xmm22, dword ptr [rdx - 512]
+0x62,0xe1,0x7f,0x08,0x2e,0x72,0x80
+
diff --git a/llvm/test/MC/X86/avx10.2-com-ef-32-att.s b/llvm/test/MC/X86/avx10.2-com-ef-32-att.s
new file mode 100644
index 00000000000000..8883bb3d6775a6
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2-com-ef-32-att.s
@@ -0,0 +1,194 @@
+// RUN: llvm-mc -triple i386 --show-encoding %s | FileCheck %s
+
+// CHECK: vcomxsd %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0xd3]
+ vcomxsd %xmm3, %xmm2
+
+// CHECK: vcomxsd {sae}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x18,0x2f,0xd3]
+ vcomxsd {sae}, %xmm3, %xmm2
+
+// CHECK: vcomxsd 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcomxsd 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcomxsd 291(%edi,%eax,4), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcomxsd 291(%edi,%eax,4), %xmm2
+
+// CHECK: vcomxsd (%eax), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x10]
+ vcomxsd (%eax), %xmm2
+
+// CHECK: vcomxsd -256(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x14,0x6d,0x00,0xff,0xff,0xff]
+ vcomxsd -256(,%ebp,2), %xmm2
+
+// CHECK: vcomxsd 1016(%ecx), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x51,0x7f]
+ vcomxsd 1016(%ecx), %xmm2
+
+// CHECK: vcomxsd -1024(%edx), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x52,0x80]
+ vcomxsd -1024(%edx), %xmm2
+
+// CHECK: vcomxsh %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0xd3]
+ vcomxsh %xmm3, %xmm2
+
+// CHECK: vcomxsh {sae}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x2f,0xd3]
+ vcomxsh {sae}, %xmm3, %xmm2
+
+// CHECK: vcomxsh 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcomxsh 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcomxsh 291(%edi,%eax,4), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcomxsh 291(%edi,%eax,4), %xmm2
+
+// CHECK: vcomxsh (%eax), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x10]
+ vcomxsh (%eax), %xmm2
+
+// CHECK: vcomxsh -64(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x14,0x6d,0xc0,0xff,0xff,0xff]
+ vcomxsh -64(,%ebp,2), %xmm2
+
+// CHECK: vcomxsh 254(%ecx), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x51,0x7f]
+ vcomxsh 254(%ecx), %xmm2
+
+// CHECK: vcomxsh -256(%edx), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x52,0x80]
+ vcomxsh -256(%edx), %xmm2
+
+// CHECK: vcomxss %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0xd3]
+ vcomxss %xmm3, %xmm2
+
+// CHECK: vcomxss {sae}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x18,0x2f,0xd3]
+ vcomxss {sae}, %xmm3, %xmm2
+
+// CHECK: vcomxss 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcomxss 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcomxss 291(%edi,%eax,4), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcomxss 291(%edi,%eax,4), %xmm2
+
+// CHECK: vcomxss (%eax), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x10]
+ vcomxss (%eax), %xmm2
+
+// CHECK: vcomxss -128(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x14,0x6d,0x80,0xff,0xff,0xff]
+ vcomxss -128(,%ebp,2), %xmm2
+
+// CHECK: vcomxss 508(%ecx), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x51,0x7f]
+ vcomxss 508(%ecx), %xmm2
+
+// CHECK: vcomxss -512(%edx), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x52,0x80]
+ vcomxss -512(%edx), %xmm2
+
+// CHECK: vucomxsd %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0xd3]
+ vucomxsd %xmm3, %xmm2
+
+// CHECK: vucomxsd {sae}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x18,0x2e,0xd3]
+ vucomxsd {sae}, %xmm3, %xmm2
+
+// CHECK: vucomxsd 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vucomxsd 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vucomxsd 291(%edi,%eax,4), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vucomxsd 291(%edi,%eax,4), %xmm2
+
+// CHECK: vucomxsd (%eax), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x10]
+ vucomxsd (%eax), %xmm2
+
+// CHECK: vucomxsd -256(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x14,0x6d,0x00,0xff,0xff,0xff]
+ vucomxsd -256(,%ebp,2), %xmm2
+
+// CHECK: vucomxsd 1016(%ecx), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x51,0x7f]
+ vucomxsd 1016(%ecx), %xmm2
+
+// CHECK: vucomxsd -1024(%edx), %xmm2
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x52,0x80]
+ vucomxsd -1024(%edx), %xmm2
+
+// CHECK: vucomxsh %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0xd3]
+ vucomxsh %xmm3, %xmm2
+
+// CHECK: vucomxsh {sae}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x2e,0xd3]
+ vucomxsh {sae}, %xmm3, %xmm2
+
+// CHECK: vucomxsh 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vucomxsh 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vucomxsh 291(%edi,%eax,4), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vucomxsh 291(%edi,%eax,4), %xmm2
+
+// CHECK: vucomxsh (%eax), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x10]
+ vucomxsh (%eax), %xmm2
+
+// CHECK: vucomxsh -64(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x14,0x6d,0xc0,0xff,0xff,0xff]
+ vucomxsh -64(,%ebp,2), %xmm2
+
+// CHECK: vucomxsh 254(%ecx), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x51,0x7f]
+ vucomxsh 254(%ecx), %xmm2
+
+// CHECK: vucomxsh -256(%edx), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x52,0x80]
+ vucomxsh -256(%edx), %xmm2
+
+// CHECK: vucomxss %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0xd3]
+ vucomxss %xmm3, %xmm2
+
+// CHECK: vucomxss {sae}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x18,0x2e,0xd3]
+ vucomxss {sae}, %xmm3, %xmm2
+
+// CHECK: vucomxss 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vucomxss 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vucomxss 291(%edi,%eax,4), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vucomxss 291(%edi,%eax,4), %xmm2
+
+// CHECK: vucomxss (%eax), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x10]
+ vucomxss (%eax), %xmm2
+
+// CHECK: vucomxss -128(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x14,0x6d,0x80,0xff,0xff,0xff]
+ vucomxss -128(,%ebp,2), %xmm2
+
+// CHECK: vucomxss 508(%ecx), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x51,0x7f]
+ vucomxss 508(%ecx), %xmm2
+
+// CHECK: vucomxss -512(%edx), %xmm2
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x52,0x80]
+ vucomxss -512(%edx), %xmm2
+
diff --git a/llvm/test/MC/X86/avx10.2-com-ef-32-intel.s b/llvm/test/MC/X86/avx10.2-com-ef-32-intel.s
new file mode 100644
index 00000000000000..9ff0484db133cd
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2-com-ef-32-intel.s
@@ -0,0 +1,194 @@
+// RUN: llvm-mc -triple i386 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: vcomxsd xmm2, xmm3
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0xd3]
+ vcomxsd xmm2, xmm3
+
+// CHECK: vcomxsd xmm2, xmm3, {sae}
+// CHECK: encoding: [0x62,0xf1,0xfe,0x18,0x2f,0xd3]
+ vcomxsd xmm2, xmm3, {sae}
+
+// CHECK: vcomxsd xmm2, qword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcomxsd xmm2, qword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcomxsd xmm2, qword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcomxsd xmm2, qword ptr [edi + 4*eax + 291]
+
+// CHECK: vcomxsd xmm2, qword ptr [eax]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x10]
+ vcomxsd xmm2, qword ptr [eax]
+
+// CHECK: vcomxsd xmm2, qword ptr [2*ebp - 256]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x14,0x6d,0x00,0xff,0xff,0xff]
+ vcomxsd xmm2, qword ptr [2*ebp - 256]
+
+// CHECK: vcomxsd xmm2, qword ptr [ecx + 1016]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x51,0x7f]
+ vcomxsd xmm2, qword ptr [ecx + 1016]
+
+// CHECK: vcomxsd xmm2, qword ptr [edx - 1024]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2f,0x52,0x80]
+ vcomxsd xmm2, qword ptr [edx - 1024]
+
+// CHECK: vcomxsh xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0xd3]
+ vcomxsh xmm2, xmm3
+
+// CHECK: vcomxsh xmm2, xmm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x2f,0xd3]
+ vcomxsh xmm2, xmm3, {sae}
+
+// CHECK: vcomxsh xmm2, word ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcomxsh xmm2, word ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcomxsh xmm2, word ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcomxsh xmm2, word ptr [edi + 4*eax + 291]
+
+// CHECK: vcomxsh xmm2, word ptr [eax]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x10]
+ vcomxsh xmm2, word ptr [eax]
+
+// CHECK: vcomxsh xmm2, word ptr [2*ebp - 64]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x14,0x6d,0xc0,0xff,0xff,0xff]
+ vcomxsh xmm2, word ptr [2*ebp - 64]
+
+// CHECK: vcomxsh xmm2, word ptr [ecx + 254]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x51,0x7f]
+ vcomxsh xmm2, word ptr [ecx + 254]
+
+// CHECK: vcomxsh xmm2, word ptr [edx - 256]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2f,0x52,0x80]
+ vcomxsh xmm2, word ptr [edx - 256]
+
+// CHECK: vcomxss xmm2, xmm3
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0xd3]
+ vcomxss xmm2, xmm3
+
+// CHECK: vcomxss xmm2, xmm3, {sae}
+// CHECK: encoding: [0x62,0xf1,0x7f,0x18,0x2f,0xd3]
+ vcomxss xmm2, xmm3, {sae}
+
+// CHECK: vcomxss xmm2, dword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcomxss xmm2, dword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcomxss xmm2, dword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcomxss xmm2, dword ptr [edi + 4*eax + 291]
+
+// CHECK: vcomxss xmm2, dword ptr [eax]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x10]
+ vcomxss xmm2, dword ptr [eax]
+
+// CHECK: vcomxss xmm2, dword ptr [2*ebp - 128]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x14,0x6d,0x80,0xff,0xff,0xff]
+ vcomxss xmm2, dword ptr [2*ebp - 128]
+
+// CHECK: vcomxss xmm2, dword ptr [ecx + 508]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x51,0x7f]
+ vcomxss xmm2, dword ptr [ecx + 508]
+
+// CHECK: vcomxss xmm2, dword ptr [edx - 512]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2f,0x52,0x80]
+ vcomxss xmm2, dword ptr [edx - 512]
+
+// CHECK: vucomxsd xmm2, xmm3
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0xd3]
+ vucomxsd xmm2, xmm3
+
+// CHECK: vucomxsd xmm2, xmm3, {sae}
+// CHECK: encoding: [0x62,0xf1,0xfe,0x18,0x2e,0xd3]
+ vucomxsd xmm2, xmm3, {sae}
+
+// CHECK: vucomxsd xmm2, qword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vucomxsd xmm2, qword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vucomxsd xmm2, qword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vucomxsd xmm2, qword ptr [edi + 4*eax + 291]
+
+// CHECK: vucomxsd xmm2, qword ptr [eax]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x10]
+ vucomxsd xmm2, qword ptr [eax]
+
+// CHECK: vucomxsd xmm2, qword ptr [2*ebp - 256]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x14,0x6d,0x00,0xff,0xff,0xff]
+ vucomxsd xmm2, qword ptr [2*ebp - 256]
+
+// CHECK: vucomxsd xmm2, qword ptr [ecx + 1016]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x51,0x7f]
+ vucomxsd xmm2, qword ptr [ecx + 1016]
+
+// CHECK: vucomxsd xmm2, qword ptr [edx - 1024]
+// CHECK: encoding: [0x62,0xf1,0xfe,0x08,0x2e,0x52,0x80]
+ vucomxsd xmm2, qword ptr [edx - 1024]
+
+// CHECK: vucomxsh xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0xd3]
+ vucomxsh xmm2, xmm3
+
+// CHECK: vucomxsh xmm2, xmm3, {sae}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x2e,0xd3]
+ vucomxsh xmm2, xmm3, {sae}
+
+// CHECK: vucomxsh xmm2, word ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vucomxsh xmm2, word ptr [esp + 8*esi + 268435456]
+
+// CHECK: vucomxsh xmm2, word ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vucomxsh xmm2, word ptr [edi + 4*eax + 291]
+
+// CHECK: vucomxsh xmm2, word ptr [eax]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x10]
+ vucomxsh xmm2, word ptr [eax]
+
+// CHECK: vucomxsh xmm2, word ptr [2*ebp - 64]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x14,0x6d,0xc0,0xff,0xff,0xff]
+ vucomxsh xmm2, word ptr [2*ebp - 64]
+
+// CHECK: vucomxsh xmm2, word ptr [ecx + 254]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x51,0x7f]
+ vucomxsh xmm2, word ptr [ecx + 254]
+
+// CHECK: vucomxsh xmm2, word ptr [edx - 256]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x2e,0x52,0x80]
+ vucomxsh xmm2, word ptr [edx - 256]
+
+// CHECK: vucomxss xmm2, xmm3
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0xd3]
+ vucomxss xmm2, xmm3
+
+// CHECK: vucomxss xmm2, xmm3, {sae}
+// CHECK: encoding: [0x62,0xf1,0x7f,0x18,0x2e,0xd3]
+ vucomxss xmm2, xmm3, {sae}
+
+// CHECK: vucomxss xmm2, dword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vucomxss xmm2, dword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vucomxss xmm2, dword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vucomxss xmm2, dword ptr [edi + 4*eax + 291]
+
+// CHECK: vucomxss xmm2, dword ptr [eax]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x10]
+ vucomxss xmm2, dword ptr [eax]
+
+// CHECK: vucomxss xmm2, dword ptr [2*ebp - 128]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x14,0x6d,0x80,0xff,0xff,0xff]
+ vucomxss xmm2, dword ptr [2*ebp - 128]
+
+// CHECK: vucomxss xmm2, dword ptr [ecx + 508]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x51,0x7f]
+ vucomxss xmm2, dword ptr [ecx + 508]
+
+// CHECK: vucomxss xmm2, dword ptr [edx - 512]
+// CHECK: encoding: [0x62,0xf1,0x7f,0x08,0x2e,0x52,0x80]
+ vucomxss xmm2, dword ptr [edx - 512]
+
diff --git a/llvm/test/MC/X86/avx10.2-com-ef-64-att.s b/llvm/test/MC/X86/avx10.2-com-ef-64-att.s
new file mode 100644
index 00000000000000..2f3690537334ad
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2-com-ef-64-att.s
@@ -0,0 +1,194 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+// CHECK: vcomxsd %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa1,0xfe,0x08,0x2f,0xf7]
+ vcomxsd %xmm23, %xmm22
+
+// CHECK: vcomxsd {sae}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa1,0xfe,0x18,0x2f,0xf7]
+ vcomxsd {sae}, %xmm23, %xmm22
+
+// CHECK: vcomxsd 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa1,0xfe,0x08,0x2f,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcomxsd 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcomxsd 291(%r8,%rax,4), %xmm22
+// CHECK: encoding: [0x62,0xc1,0xfe,0x08,0x2f,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcomxsd 291(%r8,%rax,4), %xmm22
+
+// CHECK: vcomxsd (%rip), %xmm22
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2f,0x35,0x00,0x00,0x00,0x00]
+ vcomxsd (%rip), %xmm22
+
+// CHECK: vcomxsd -256(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2f,0x34,0x6d,0x00,0xff,0xff,0xff]
+ vcomxsd -256(,%rbp,2), %xmm22
+
+// CHECK: vcomxsd 1016(%rcx), %xmm22
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2f,0x71,0x7f]
+ vcomxsd 1016(%rcx), %xmm22
+
+// CHECK: vcomxsd -1024(%rdx), %xmm22
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2f,0x72,0x80]
+ vcomxsd -1024(%rdx), %xmm22
+
+// CHECK: vcomxsh %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x2f,0xf7]
+ vcomxsh %xmm23, %xmm22
+
+// CHECK: vcomxsh {sae}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x18,0x2f,0xf7]
+ vcomxsh {sae}, %xmm23, %xmm22
+
+// CHECK: vcomxsh 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x2f,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcomxsh 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcomxsh 291(%r8,%rax,4), %xmm22
+// CHECK: encoding: [0x62,0xc5,0x7f,0x08,0x2f,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcomxsh 291(%r8,%rax,4), %xmm22
+
+// CHECK: vcomxsh (%rip), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2f,0x35,0x00,0x00,0x00,0x00]
+ vcomxsh (%rip), %xmm22
+
+// CHECK: vcomxsh -64(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2f,0x34,0x6d,0xc0,0xff,0xff,0xff]
+ vcomxsh -64(,%rbp,2), %xmm22
+
+// CHECK: vcomxsh 254(%rcx), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2f,0x71,0x7f]
+ vcomxsh 254(%rcx), %xmm22
+
+// CHECK: vcomxsh -256(%rdx), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2f,0x72,0x80]
+ vcomxsh -256(%rdx), %xmm22
+
+// CHECK: vcomxss %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa1,0x7f,0x08,0x2f,0xf7]
+ vcomxss %xmm23, %xmm22
+
+// CHECK: vcomxss {sae}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa1,0x7f,0x18,0x2f,0xf7]
+ vcomxss {sae}, %xmm23, %xmm22
+
+// CHECK: vcomxss 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa1,0x7f,0x08,0x2f,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcomxss 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcomxss 291(%r8,%rax,4), %xmm22
+// CHECK: encoding: [0x62,0xc1,0x7f,0x08,0x2f,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcomxss 291(%r8,%rax,4), %xmm22
+
+// CHECK: vcomxss (%rip), %xmm22
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2f,0x35,0x00,0x00,0x00,0x00]
+ vcomxss (%rip), %xmm22
+
+// CHECK: vcomxss -128(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2f,0x34,0x6d,0x80,0xff,0xff,0xff]
+ vcomxss -128(,%rbp,2), %xmm22
+
+// CHECK: vcomxss 508(%rcx), %xmm22
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2f,0x71,0x7f]
+ vcomxss 508(%rcx), %xmm22
+
+// CHECK: vcomxss -512(%rdx), %xmm22
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2f,0x72,0x80]
+ vcomxss -512(%rdx), %xmm22
+
+// CHECK: vucomxsd %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa1,0xfe,0x08,0x2e,0xf7]
+ vucomxsd %xmm23, %xmm22
+
+// CHECK: vucomxsd {sae}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa1,0xfe,0x18,0x2e,0xf7]
+ vucomxsd {sae}, %xmm23, %xmm22
+
+// CHECK: vucomxsd 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa1,0xfe,0x08,0x2e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vucomxsd 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vucomxsd 291(%r8,%rax,4), %xmm22
+// CHECK: encoding: [0x62,0xc1,0xfe,0x08,0x2e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vucomxsd 291(%r8,%rax,4), %xmm22
+
+// CHECK: vucomxsd (%rip), %xmm22
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2e,0x35,0x00,0x00,0x00,0x00]
+ vucomxsd (%rip), %xmm22
+
+// CHECK: vucomxsd -256(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2e,0x34,0x6d,0x00,0xff,0xff,0xff]
+ vucomxsd -256(,%rbp,2), %xmm22
+
+// CHECK: vucomxsd 1016(%rcx), %xmm22
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2e,0x71,0x7f]
+ vucomxsd 1016(%rcx), %xmm22
+
+// CHECK: vucomxsd -1024(%rdx), %xmm22
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2e,0x72,0x80]
+ vucomxsd -1024(%rdx), %xmm22
+
+// CHECK: vucomxsh %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x2e,0xf7]
+ vucomxsh %xmm23, %xmm22
+
+// CHECK: vucomxsh {sae}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x18,0x2e,0xf7]
+ vucomxsh {sae}, %xmm23, %xmm22
+
+// CHECK: vucomxsh 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x2e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vucomxsh 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vucomxsh 291(%r8,%rax,4), %xmm22
+// CHECK: encoding: [0x62,0xc5,0x7f,0x08,0x2e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vucomxsh 291(%r8,%rax,4), %xmm22
+
+// CHECK: vucomxsh (%rip), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2e,0x35,0x00,0x00,0x00,0x00]
+ vucomxsh (%rip), %xmm22
+
+// CHECK: vucomxsh -64(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2e,0x34,0x6d,0xc0,0xff,0xff,0xff]
+ vucomxsh -64(,%rbp,2), %xmm22
+
+// CHECK: vucomxsh 254(%rcx), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2e,0x71,0x7f]
+ vucomxsh 254(%rcx), %xmm22
+
+// CHECK: vucomxsh -256(%rdx), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2e,0x72,0x80]
+ vucomxsh -256(%rdx), %xmm22
+
+// CHECK: vucomxss %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa1,0x7f,0x08,0x2e,0xf7]
+ vucomxss %xmm23, %xmm22
+
+// CHECK: vucomxss {sae}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa1,0x7f,0x18,0x2e,0xf7]
+ vucomxss {sae}, %xmm23, %xmm22
+
+// CHECK: vucomxss 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa1,0x7f,0x08,0x2e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vucomxss 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vucomxss 291(%r8,%rax,4), %xmm22
+// CHECK: encoding: [0x62,0xc1,0x7f,0x08,0x2e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vucomxss 291(%r8,%rax,4), %xmm22
+
+// CHECK: vucomxss (%rip), %xmm22
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2e,0x35,0x00,0x00,0x00,0x00]
+ vucomxss (%rip), %xmm22
+
+// CHECK: vucomxss -128(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2e,0x34,0x6d,0x80,0xff,0xff,0xff]
+ vucomxss -128(,%rbp,2), %xmm22
+
+// CHECK: vucomxss 508(%rcx), %xmm22
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2e,0x71,0x7f]
+ vucomxss 508(%rcx), %xmm22
+
+// CHECK: vucomxss -512(%rdx), %xmm22
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2e,0x72,0x80]
+ vucomxss -512(%rdx), %xmm22
+
diff --git a/llvm/test/MC/X86/avx10.2-com-ef-64-intel.s b/llvm/test/MC/X86/avx10.2-com-ef-64-intel.s
new file mode 100644
index 00000000000000..41aaf99270b886
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2-com-ef-64-intel.s
@@ -0,0 +1,194 @@
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: vcomxsd xmm22, xmm23
+// CHECK: encoding: [0x62,0xa1,0xfe,0x08,0x2f,0xf7]
+ vcomxsd xmm22, xmm23
+
+// CHECK: vcomxsd xmm22, xmm23, {sae}
+// CHECK: encoding: [0x62,0xa1,0xfe,0x18,0x2f,0xf7]
+ vcomxsd xmm22, xmm23, {sae}
+
+// CHECK: vcomxsd xmm22, qword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa1,0xfe,0x08,0x2f,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcomxsd xmm22, qword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcomxsd xmm22, qword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc1,0xfe,0x08,0x2f,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcomxsd xmm22, qword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcomxsd xmm22, qword ptr [rip]
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2f,0x35,0x00,0x00,0x00,0x00]
+ vcomxsd xmm22, qword ptr [rip]
+
+// CHECK: vcomxsd xmm22, qword ptr [2*rbp - 256]
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2f,0x34,0x6d,0x00,0xff,0xff,0xff]
+ vcomxsd xmm22, qword ptr [2*rbp - 256]
+
+// CHECK: vcomxsd xmm22, qword ptr [rcx + 1016]
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2f,0x71,0x7f]
+ vcomxsd xmm22, qword ptr [rcx + 1016]
+
+// CHECK: vcomxsd xmm22, qword ptr [rdx - 1024]
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2f,0x72,0x80]
+ vcomxsd xmm22, qword ptr [rdx - 1024]
+
+// CHECK: vcomxsh xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x2f,0xf7]
+ vcomxsh xmm22, xmm23
+
+// CHECK: vcomxsh xmm22, xmm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x18,0x2f,0xf7]
+ vcomxsh xmm22, xmm23, {sae}
+
+// CHECK: vcomxsh xmm22, word ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x2f,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcomxsh xmm22, word ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcomxsh xmm22, word ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x08,0x2f,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcomxsh xmm22, word ptr [r8 + 4*rax + 291]
+
+// CHECK: vcomxsh xmm22, word ptr [rip]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2f,0x35,0x00,0x00,0x00,0x00]
+ vcomxsh xmm22, word ptr [rip]
+
+// CHECK: vcomxsh xmm22, word ptr [2*rbp - 64]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2f,0x34,0x6d,0xc0,0xff,0xff,0xff]
+ vcomxsh xmm22, word ptr [2*rbp - 64]
+
+// CHECK: vcomxsh xmm22, word ptr [rcx + 254]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2f,0x71,0x7f]
+ vcomxsh xmm22, word ptr [rcx + 254]
+
+// CHECK: vcomxsh xmm22, word ptr [rdx - 256]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2f,0x72,0x80]
+ vcomxsh xmm22, word ptr [rdx - 256]
+
+// CHECK: vcomxss xmm22, xmm23
+// CHECK: encoding: [0x62,0xa1,0x7f,0x08,0x2f,0xf7]
+ vcomxss xmm22, xmm23
+
+// CHECK: vcomxss xmm22, xmm23, {sae}
+// CHECK: encoding: [0x62,0xa1,0x7f,0x18,0x2f,0xf7]
+ vcomxss xmm22, xmm23, {sae}
+
+// CHECK: vcomxss xmm22, dword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa1,0x7f,0x08,0x2f,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcomxss xmm22, dword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcomxss xmm22, dword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc1,0x7f,0x08,0x2f,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcomxss xmm22, dword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcomxss xmm22, dword ptr [rip]
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2f,0x35,0x00,0x00,0x00,0x00]
+ vcomxss xmm22, dword ptr [rip]
+
+// CHECK: vcomxss xmm22, dword ptr [2*rbp - 128]
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2f,0x34,0x6d,0x80,0xff,0xff,0xff]
+ vcomxss xmm22, dword ptr [2*rbp - 128]
+
+// CHECK: vcomxss xmm22, dword ptr [rcx + 508]
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2f,0x71,0x7f]
+ vcomxss xmm22, dword ptr [rcx + 508]
+
+// CHECK: vcomxss xmm22, dword ptr [rdx - 512]
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2f,0x72,0x80]
+ vcomxss xmm22, dword ptr [rdx - 512]
+
+// CHECK: vucomxsd xmm22, xmm23
+// CHECK: encoding: [0x62,0xa1,0xfe,0x08,0x2e,0xf7]
+ vucomxsd xmm22, xmm23
+
+// CHECK: vucomxsd xmm22, xmm23, {sae}
+// CHECK: encoding: [0x62,0xa1,0xfe,0x18,0x2e,0xf7]
+ vucomxsd xmm22, xmm23, {sae}
+
+// CHECK: vucomxsd xmm22, qword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa1,0xfe,0x08,0x2e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vucomxsd xmm22, qword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vucomxsd xmm22, qword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc1,0xfe,0x08,0x2e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vucomxsd xmm22, qword ptr [r8 + 4*rax + 291]
+
+// CHECK: vucomxsd xmm22, qword ptr [rip]
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2e,0x35,0x00,0x00,0x00,0x00]
+ vucomxsd xmm22, qword ptr [rip]
+
+// CHECK: vucomxsd xmm22, qword ptr [2*rbp - 256]
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2e,0x34,0x6d,0x00,0xff,0xff,0xff]
+ vucomxsd xmm22, qword ptr [2*rbp - 256]
+
+// CHECK: vucomxsd xmm22, qword ptr [rcx + 1016]
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2e,0x71,0x7f]
+ vucomxsd xmm22, qword ptr [rcx + 1016]
+
+// CHECK: vucomxsd xmm22, qword ptr [rdx - 1024]
+// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x2e,0x72,0x80]
+ vucomxsd xmm22, qword ptr [rdx - 1024]
+
+// CHECK: vucomxsh xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x2e,0xf7]
+ vucomxsh xmm22, xmm23
+
+// CHECK: vucomxsh xmm22, xmm23, {sae}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x18,0x2e,0xf7]
+ vucomxsh xmm22, xmm23, {sae}
+
+// CHECK: vucomxsh xmm22, word ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x2e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vucomxsh xmm22, word ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vucomxsh xmm22, word ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x08,0x2e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vucomxsh xmm22, word ptr [r8 + 4*rax + 291]
+
+// CHECK: vucomxsh xmm22, word ptr [rip]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2e,0x35,0x00,0x00,0x00,0x00]
+ vucomxsh xmm22, word ptr [rip]
+
+// CHECK: vucomxsh xmm22, word ptr [2*rbp - 64]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2e,0x34,0x6d,0xc0,0xff,0xff,0xff]
+ vucomxsh xmm22, word ptr [2*rbp - 64]
+
+// CHECK: vucomxsh xmm22, word ptr [rcx + 254]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2e,0x71,0x7f]
+ vucomxsh xmm22, word ptr [rcx + 254]
+
+// CHECK: vucomxsh xmm22, word ptr [rdx - 256]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x2e,0x72,0x80]
+ vucomxsh xmm22, word ptr [rdx - 256]
+
+// CHECK: vucomxss xmm22, xmm23
+// CHECK: encoding: [0x62,0xa1,0x7f,0x08,0x2e,0xf7]
+ vucomxss xmm22, xmm23
+
+// CHECK: vucomxss xmm22, xmm23, {sae}
+// CHECK: encoding: [0x62,0xa1,0x7f,0x18,0x2e,0xf7]
+ vucomxss xmm22, xmm23, {sae}
+
+// CHECK: vucomxss xmm22, dword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa1,0x7f,0x08,0x2e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vucomxss xmm22, dword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vucomxss xmm22, dword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc1,0x7f,0x08,0x2e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vucomxss xmm22, dword ptr [r8 + 4*rax + 291]
+
+// CHECK: vucomxss xmm22, dword ptr [rip]
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2e,0x35,0x00,0x00,0x00,0x00]
+ vucomxss xmm22, dword ptr [rip]
+
+// CHECK: vucomxss xmm22, dword ptr [2*rbp - 128]
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2e,0x34,0x6d,0x80,0xff,0xff,0xff]
+ vucomxss xmm22, dword ptr [2*rbp - 128]
+
+// CHECK: vucomxss xmm22, dword ptr [rcx + 508]
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2e,0x71,0x7f]
+ vucomxss xmm22, dword ptr [rcx + 508]
+
+// CHECK: vucomxss xmm22, dword ptr [rdx - 512]
+// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x2e,0x72,0x80]
+ vucomxss xmm22, dword ptr [rdx - 512]
+
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index e85708ac1cc458..94347839d281f9 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -1178,6 +1178,9 @@ static const X86FoldTableEntry Table1[] = {
{X86::VCOMISSrr_Int, X86::VCOMISSrm_Int, TB_NO_REVERSE},
{X86::VCOMSBF16Zrr, X86::VCOMSBF16Zrm, 0},
{X86::VCOMSBF16Zrr_Int, X86::VCOMSBF16Zrm_Int, TB_NO_REVERSE},
+ {X86::VCOMXSDZrr_Int, X86::VCOMXSDZrm_Int, TB_NO_REVERSE},
+ {X86::VCOMXSHZrr_Int, X86::VCOMXSHZrm_Int, TB_NO_REVERSE},
+ {X86::VCOMXSSZrr_Int, X86::VCOMXSSZrm_Int, TB_NO_REVERSE},
{X86::VCVTDQ2PDYrr, X86::VCVTDQ2PDYrm, 0},
{X86::VCVTDQ2PDZ128rr, X86::VCVTDQ2PDZ128rm, TB_NO_REVERSE},
{X86::VCVTDQ2PDZ256rr, X86::VCVTDQ2PDZ256rm, 0},
@@ -1954,6 +1957,9 @@ static const X86FoldTableEntry Table1[] = {
{X86::VUCOMISSZrr_Int, X86::VUCOMISSZrm_Int, TB_NO_REVERSE},
{X86::VUCOMISSrr, X86::VUCOMISSrm, 0},
{X86::VUCOMISSrr_Int, X86::VUCOMISSrm_Int, TB_NO_REVERSE},
+ {X86::VUCOMXSDZrr_Int, X86::VUCOMXSDZrm_Int, TB_NO_REVERSE},
+ {X86::VUCOMXSHZrr_Int, X86::VUCOMXSHZrm_Int, TB_NO_REVERSE},
+ {X86::VUCOMXSSZrr_Int, X86::VUCOMXSSZrm_Int, TB_NO_REVERSE},
{X86::XOR16ri8_ND, X86::XOR16mi8_ND, 0},
{X86::XOR16ri8_NF_ND, X86::XOR16mi8_NF_ND, 0},
{X86::XOR16ri_ND, X86::XOR16mi_ND, 0},
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