[llvm] [AArch64][CostModel] Reduce the cost of fadd reduction with fast flag (PR #108791)

[David Green via llvm-commits]

================
@@ -4147,6 +4147,22 @@ AArch64TTIImpl::getArithmeticReductionCost(unsigned Opcode, VectorType *ValTy,
   switch (ISD) {
   default:
     break;
+  case ISD::FADD: {
+    if (MTy.isVector()) {
+      // FIXME: Consider cases where the number of vector elements is not power
+      // of 2.
+      const unsigned NElts = MTy.getVectorNumElements();
+      if (ValTy->getElementCount().getFixedValue() >= 2 && NElts >= 2 &&
+          isPowerOf2_32(NElts)) {
----------------
davemgreen wrote:

Yeah that sounds OK. We have some other code for fneg costs that does this and checks fp32 and fp64 too, but some others are a little different:
```
if (Ty->isFloatTy() || Ty->isDoubleTy() || (Ty->isHalfTy() && ST->hasFullFP16()))) 
  do patch cost
else
  fallback to current cost 
```

https://github.com/llvm/llvm-project/pull/108791