[llvm] [AMDGPU] Omit isReg() check for all_uses() in SIInsertWaitcnts. NFC. (PR #109041)

[Stanislav Mekhanoshin via llvm-commits]

https://github.com/rampitec created https://github.com/llvm/llvm-project/pull/109041

None

>From 6f61fd73f712ca99881920a82d8f9f5cbfcd46c7 Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Tue, 17 Sep 2024 13:21:51 -0700
Subject: [PATCH] [AMDGPU] Omit isReg() check for all_uses() in
 SIInsertWaitcnts. NFC.

---
 llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index fd9fe1196b7853..a5668272601384 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -820,7 +820,7 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
                  Inst.getOpcode() != AMDGPU::DS_CONSUME &&
                  Inst.getOpcode() != AMDGPU::DS_ORDERED_COUNT) {
         for (const MachineOperand &Op : Inst.all_uses()) {
-          if (Op.isReg() && TRI->isVectorRegister(*MRI, Op.getReg()))
+          if (TRI->isVectorRegister(*MRI, Op.getReg()))
             setExpScore(&Inst, TRI, MRI, Op, CurrScore);
         }
       }
@@ -872,7 +872,7 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
         }
       }
       for (const MachineOperand &Op : Inst.all_uses()) {
-        if (Op.isReg() && TRI->isVectorRegister(*MRI, Op.getReg()))
+        if (TRI->isVectorRegister(*MRI, Op.getReg()))
           setExpScore(&Inst, TRI, MRI, Op, CurrScore);
       }
     }
@@ -2327,7 +2327,7 @@ bool SIInsertWaitcnts::shouldFlushVmCnt(MachineLoop *ML,
           HasVMemStore = true;
       }
       for (const MachineOperand &Op : MI.all_uses()) {
-        if (!Op.isReg() || !TRI->isVectorRegister(*MRI, Op.getReg()))
+        if (!TRI->isVectorRegister(*MRI, Op.getReg()))
           continue;
         RegInterval Interval = Brackets.getRegInterval(&MI, MRI, TRI, Op);
         // Vgpr use