[llvm] [AArch64] Consider histcnt smaller than i32 in the cost model (PR #108521)
Sam Tebbs via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 17 06:26:45 PDT 2024
https://github.com/SamTebbs33 updated https://github.com/llvm/llvm-project/pull/108521
>From 6ca96853eb1f0779c1208ea5ee373a902a47ea0b Mon Sep 17 00:00:00 2001
From: DevM-uk <max.beck-jones at arm.com>
Date: Fri, 13 Sep 2024 10:15:49 +0100
Subject: [PATCH 1/2] [AArch64] Consider histcnt smaller than i32 in the cost
model
This PR updates the AArch64 cost model to consider the cheaper cost of
<i32 histograms to reflect the improvements from
https://github.com/llvm/llvm-project/pull/101017 and https://github.com/llvm/llvm-project/pull/103037
Work by Max Beck-Jones (@DevM-uk)
---
.../AArch64/AArch64TargetTransformInfo.cpp | 28 +++++++++++--------
.../CostModel/AArch64/sve-intrinsics.ll | 18 ++++++------
2 files changed, 26 insertions(+), 20 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index 58c267f1ce4bd6..83b5344fc8ed24 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -517,25 +517,31 @@ static bool isUnpackedVectorVT(EVT VecVT) {
static InstructionCost getHistogramCost(const IntrinsicCostAttributes &ICA) {
Type *BucketPtrsTy = ICA.getArgTypes()[0]; // Type of vector of pointers
Type *EltTy = ICA.getArgTypes()[1]; // Type of bucket elements
+ unsigned TotalHistCnts = 1;
- // Only allow (32b and 64b) integers or pointers for now...
+ // Only allow (up to 64b) integers or pointers
if ((!EltTy->isIntegerTy() && !EltTy->isPointerTy()) ||
- (EltTy->getScalarSizeInBits() != 32 &&
- EltTy->getScalarSizeInBits() != 64))
+ EltTy->getScalarSizeInBits() > 64)
return InstructionCost::getInvalid();
- // FIXME: Hacky check for legal vector types. We can promote smaller types
- // but we cannot legalize vectors via splitting for histcnt.
// FIXME: We should be able to generate histcnt for fixed-length vectors
// using ptrue with a specific VL.
- if (VectorType *VTy = dyn_cast<VectorType>(BucketPtrsTy))
- if ((VTy->getElementCount().getKnownMinValue() != 2 &&
- VTy->getElementCount().getKnownMinValue() != 4) ||
- VTy->getPrimitiveSizeInBits().getKnownMinValue() > 128 ||
- !VTy->isScalableTy())
+ if (VectorType *VTy = dyn_cast<VectorType>(BucketPtrsTy)) {
+ unsigned EC = VTy->getElementCount().getKnownMinValue();
+ if (!isPowerOf2_64(EC) || !VTy->isScalableTy())
return InstructionCost::getInvalid();
- return InstructionCost(BaseHistCntCost);
+ bool Element64b = EltTy->isIntegerTy(64);
+
+ if (EC == 2 || (!Element64b && EC == 4))
+ return InstructionCost(BaseHistCntCost);
+
+ unsigned NaturalVectorWidth = Element64b ? AArch64::SVEBitsPerBlock / 64
+ : AArch64::SVEBitsPerBlock / 32;
+ TotalHistCnts = EC / NaturalVectorWidth;
+ }
+
+ return InstructionCost(BaseHistCntCost * TotalHistCnts);
}
InstructionCost
diff --git a/llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll b/llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
index aede9c89843128..1ecd02e5c124a6 100644
--- a/llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
+++ b/llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
@@ -971,26 +971,26 @@ define void @histogram_nxv4i32(<vscale x 4 x ptr> %buckets, <vscale x 4 x i1> %m
ret void
}
-define void @histogram_nxv8i16(<vscale x 8 x ptr> %buckets, <vscale x 8 x i1> %mask) {
+define void @histogram_nxv8i16(<vscale x 8 x ptr> %buckets, <vscale x 8 x i1> %mask) #3 {
; CHECK-LABEL: 'histogram_nxv8i16'
-; CHECK-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.experimental.vector.histogram.add.nxv8p0.i16(<vscale x 8 x ptr> %buckets, i16 1, <vscale x 8 x i1> %mask)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: call void @llvm.experimental.vector.histogram.add.nxv8p0.i16(<vscale x 8 x ptr> %buckets, i16 1, <vscale x 8 x i1> %mask)
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; TYPE_BASED_ONLY-LABEL: 'histogram_nxv8i16'
-; TYPE_BASED_ONLY-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.experimental.vector.histogram.add.nxv8p0.i16(<vscale x 8 x ptr> %buckets, i16 1, <vscale x 8 x i1> %mask)
+; TYPE_BASED_ONLY-NEXT: Cost Model: Found an estimated cost of 16 for instruction: call void @llvm.experimental.vector.histogram.add.nxv8p0.i16(<vscale x 8 x ptr> %buckets, i16 1, <vscale x 8 x i1> %mask)
; TYPE_BASED_ONLY-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
call void @llvm.experimental.vector.histogram.add.nxv8p0.i16(<vscale x 8 x ptr> %buckets, i16 1, <vscale x 8 x i1> %mask)
ret void
}
-define void @histogram_nxv16i8(<vscale x 16 x ptr> %buckets, <vscale x 16 x i1> %mask) {
+define void @histogram_nxv16i8(<vscale x 16 x ptr> %buckets, <vscale x 16 x i1> %mask) #3 {
; CHECK-LABEL: 'histogram_nxv16i8'
-; CHECK-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.experimental.vector.histogram.add.nxv16p0.i8(<vscale x 16 x ptr> %buckets, i8 1, <vscale x 16 x i1> %mask)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: call void @llvm.experimental.vector.histogram.add.nxv16p0.i8(<vscale x 16 x ptr> %buckets, i8 1, <vscale x 16 x i1> %mask)
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; TYPE_BASED_ONLY-LABEL: 'histogram_nxv16i8'
-; TYPE_BASED_ONLY-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.experimental.vector.histogram.add.nxv16p0.i8(<vscale x 16 x ptr> %buckets, i8 1, <vscale x 16 x i1> %mask)
+; TYPE_BASED_ONLY-NEXT: Cost Model: Found an estimated cost of 32 for instruction: call void @llvm.experimental.vector.histogram.add.nxv16p0.i8(<vscale x 16 x ptr> %buckets, i8 1, <vscale x 16 x i1> %mask)
; TYPE_BASED_ONLY-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
call void @llvm.experimental.vector.histogram.add.nxv16p0.i64(<vscale x 16 x ptr> %buckets, i8 1, <vscale x 16 x i1> %mask)
@@ -1049,13 +1049,13 @@ define void @histogram_v16i8(<16 x ptr> %buckets, <16 x i1> %mask) {
ret void
}
-define void @histogram_nxv4i64(<vscale x 4 x ptr> %buckets, <vscale x 4 x i1> %mask) {
+define void @histogram_nxv4i64(<vscale x 4 x ptr> %buckets, <vscale x 4 x i1> %mask) #3 {
; CHECK-LABEL: 'histogram_nxv4i64'
-; CHECK-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.experimental.vector.histogram.add.nxv4p0.i64(<vscale x 4 x ptr> %buckets, i64 1, <vscale x 4 x i1> %mask)
+; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: call void @llvm.experimental.vector.histogram.add.nxv4p0.i64(<vscale x 4 x ptr> %buckets, i64 1, <vscale x 4 x i1> %mask)
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
; TYPE_BASED_ONLY-LABEL: 'histogram_nxv4i64'
-; TYPE_BASED_ONLY-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.experimental.vector.histogram.add.nxv4p0.i64(<vscale x 4 x ptr> %buckets, i64 1, <vscale x 4 x i1> %mask)
+; TYPE_BASED_ONLY-NEXT: Cost Model: Found an estimated cost of 16 for instruction: call void @llvm.experimental.vector.histogram.add.nxv4p0.i64(<vscale x 4 x ptr> %buckets, i64 1, <vscale x 4 x i1> %mask)
; TYPE_BASED_ONLY-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
call void @llvm.experimental.vector.histogram.add.nxv4p0.i64(<vscale x 4 x ptr> %buckets, i64 1, <vscale x 4 x i1> %mask)
>From 282b196235e84c1ed77362165428f07f1916adb8 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs <samuel.tebbs at arm.com>
Date: Tue, 17 Sep 2024 13:34:09 +0100
Subject: [PATCH 2/2] Add EltSize
---
.../lib/Target/AArch64/AArch64TargetTransformInfo.cpp | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index 83b5344fc8ed24..23475f65d489ea 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -519,9 +519,10 @@ static InstructionCost getHistogramCost(const IntrinsicCostAttributes &ICA) {
Type *EltTy = ICA.getArgTypes()[1]; // Type of bucket elements
unsigned TotalHistCnts = 1;
+ unsigned EltSize = EltTy->getScalarSizeInBits();
// Only allow (up to 64b) integers or pointers
if ((!EltTy->isIntegerTy() && !EltTy->isPointerTy()) ||
- EltTy->getScalarSizeInBits() > 64)
+ EltSize > 64)
return InstructionCost::getInvalid();
// FIXME: We should be able to generate histcnt for fixed-length vectors
@@ -531,13 +532,13 @@ static InstructionCost getHistogramCost(const IntrinsicCostAttributes &ICA) {
if (!isPowerOf2_64(EC) || !VTy->isScalableTy())
return InstructionCost::getInvalid();
- bool Element64b = EltTy->isIntegerTy(64);
+ // HistCnt only supports 32b and 64b element types
+ unsigned LegalEltSize = EltSize <= 32 ? 32 : 64;
- if (EC == 2 || (!Element64b && EC == 4))
+ if (EC == 2 || (!LegalEltSize == 32 && EC == 4))
return InstructionCost(BaseHistCntCost);
- unsigned NaturalVectorWidth = Element64b ? AArch64::SVEBitsPerBlock / 64
- : AArch64::SVEBitsPerBlock / 32;
+ unsigned NaturalVectorWidth = AArch64::SVEBitsPerBlock / LegalEltSize;
TotalHistCnts = EC / NaturalVectorWidth;
}
More information about the llvm-commits
mailing list