[llvm] [AMDGPU] Exclude implicit uses and defs in SIInsertWaitcnts. NFC. (PR #108953)
Stanislav Mekhanoshin via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 17 03:30:38 PDT 2024
================
@@ -863,15 +863,15 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
// can be used as the actual source after export patching, so
// we need to treat them like sources and set the EXP_CNT
// score.
- for (MachineOperand &DefMO : Inst.all_defs()) {
+ for (MachineOperand &DefMO : Inst.defs()) {
if (TRI->isVGPR(*MRI, DefMO.getReg())) {
setRegScore(
TRI->getEncodingValue(AMDGPU::getMCReg(DefMO.getReg(), *ST)),
EXP_CNT, CurrScore);
}
}
}
- for (const MachineOperand &Op : Inst.all_uses()) {
+ for (const MachineOperand &Op : Inst.uses()) {
----------------
rampitec wrote:
We do not define implicit VGPR uses anywhere, except for super-reg liveness purposes. This is my assumption here. The next line checks it is a VGPR, so this is not some of the special registers. Am I wrong in that assumption?
https://github.com/llvm/llvm-project/pull/108953
More information about the llvm-commits
mailing list