[llvm] 4eb9780 - [RISCV] Fix IR for store_large_offset_no_opt_i16 in make-compressible-zbc.mir. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2024-09-16T12:51:07-07:00
New Revision: 4eb978026152772bcdd139899e8d0192f7ddbc11

URL: https://github.com/llvm/llvm-project/commit/4eb978026152772bcdd139899e8d0192f7ddbc11
DIFF: https://github.com/llvm/llvm-project/commit/4eb978026152772bcdd139899e8d0192f7ddbc11.diff

LOG: [RISCV] Fix IR for store_large_offset_no_opt_i16 in make-compressible-zbc.mir. NFC

The IR used loads instead of stores.

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/make-compressible-zbc.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/make-compressible-zbc.mir b/llvm/test/CodeGen/RISCV/make-compressible-zbc.mir
index 89a6ca7af9be13..d5da1515455e3b 100644
--- a/llvm/test/CodeGen/RISCV/make-compressible-zbc.mir
+++ b/llvm/test/CodeGen/RISCV/make-compressible-zbc.mir
@@ -126,6 +126,7 @@
     %d = load volatile i16, ptr %3, align 2
     ret void
   }
+
   define void @store_large_offset_no_opt_i8(ptr %p) #0 {
   entry:
     %0 = getelementptr inbounds i8, ptr %p, i8 100
@@ -140,13 +141,11 @@
   define void @store_large_offset_no_opt_i16(ptr %p) #0 {
   entry:
     %0 = getelementptr inbounds i16, ptr %p, i16 100
-    %a = load volatile i16, ptr %0, align 2
+    store volatile i8 1, ptr %0, align 2
     %1 = getelementptr inbounds i16, ptr %p, i16 100
-    %b = load volatile i16, ptr %1, align 2
+    store volatile i8 3, ptr %1, align 2
     %2 = getelementptr inbounds i16, ptr %p, i16 101
-    %c = load volatile i16, ptr %2, align 2
-    %3 = getelementptr inbounds i16, ptr %p, i16 102
-    %d = load volatile i16, ptr %3, align 2
+    store volatile i8 5, ptr %2, align 2
     ret void
   }